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charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "kexec" Errors-To: kexec-bounces+kexec=archiver.kernel.org@lists.infradead.org On 08/27/24 at 01:24pm, Will Deacon wrote: > On Mon, Aug 26, 2024 at 02:52:02PM +0800, Kuan-Ying Lee wrote: > > Since arm64 supports 5-level page tables, we need to add this > > information to vmcoreinfo to make debug tools know if 5-level > > page table is enabled or not. > > > > Missing this information will break the debug tool like crash [1]. > > > > [1] https://github.com/crash-utility/crash > > > > Signed-off-by: Kuan-Ying Lee > > --- > > Documentation/admin-guide/kdump/vmcoreinfo.rst | 6 ++++++ > > arch/arm64/kernel/vmcore_info.c | 3 +++ > > 2 files changed, 9 insertions(+) > > In which case, wouldn't you also want to know about pgtable_l4_enabled()? That is a good question. I guess it's deduced in code, mostly needed for different PAGE_OFFSET, how to transfer virtual addr to physical addr, etc. Add Crash utility experts here. _______________________________________________ kexec mailing list kexec@lists.infradead.org http://lists.infradead.org/mailman/listinfo/kexec From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.129.124]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 044D31D2F5A for ; Tue, 27 Aug 2024 22:48:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=170.10.129.124 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724798898; cv=none; b=JJR2K/wkyPECHiV6iG4y2K6LXqBolzL1RcyJSmTD9gumvp/X/7cwywy/Pemy1FO0f0IkdffDFCaeBWPuGy9Jp4Tn7e0IMu7Uc85Nww8ibdxdY8y7NGkplFZgquXKObd5aYa5A3R6CPvJ1SCj2lNO+ZxvuCrwAuZdEHbwutmuUb8= ARC-Message-Signature:i=1; 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Tue, 27 Aug 2024 22:48:10 +0000 (UTC) Received: from localhost (unknown [10.72.112.42]) by mx-prod-int-03.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTPS id 4F1161955D8C; Tue, 27 Aug 2024 22:48:07 +0000 (UTC) Date: Wed, 28 Aug 2024 06:48:03 +0800 From: Baoquan He To: Will Deacon Cc: k-hagio-ab@nec.com, lijiang@redhat.com, Kuan-Ying Lee , Vivek Goyal , Dave Young , Jonathan Corbet , Catalin Marinas , kexec@lists.infradead.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, ardb@kernel.org Subject: Re: [PATCH] arm64/vmcore: Add pgtable_l5_enabled information in vmcoreinfo Message-ID: References: <20240826065219.305963-1-kuan-ying.lee@canonical.com> <20240827122459.GA4679@willie-the-truck> Precedence: bulk X-Mailing-List: linux-doc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20240827122459.GA4679@willie-the-truck> X-Scanned-By: MIMEDefang 3.0 on 10.30.177.12 On 08/27/24 at 01:24pm, Will Deacon wrote: > On Mon, Aug 26, 2024 at 02:52:02PM +0800, Kuan-Ying Lee wrote: > > Since arm64 supports 5-level page tables, we need to add this > > information to vmcoreinfo to make debug tools know if 5-level > > page table is enabled or not. > > > > Missing this information will break the debug tool like crash [1]. > > > > [1] https://github.com/crash-utility/crash > > > > Signed-off-by: Kuan-Ying Lee > > --- > > Documentation/admin-guide/kdump/vmcoreinfo.rst | 6 ++++++ > > arch/arm64/kernel/vmcore_info.c | 3 +++ > > 2 files changed, 9 insertions(+) > > In which case, wouldn't you also want to know about pgtable_l4_enabled()? That is a good question. I guess it's deduced in code, mostly needed for different PAGE_OFFSET, how to transfer virtual addr to physical addr, etc. Add Crash utility experts here.