From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 30AEBE6FE49 for ; Mon, 9 Sep 2024 07:48:54 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 89C2488D5A; Mon, 9 Sep 2024 09:48:52 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=fail (p=quarantine dis=none) header.from=andestech.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id 43AB388D5A; Mon, 9 Sep 2024 09:48:51 +0200 (CEST) Received: from Atcsqr.andestech.com (60-248-80-70.hinet-ip.hinet.net [60.248.80.70]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 31A7588D0F for ; Mon, 9 Sep 2024 09:48:47 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=fail (p=quarantine dis=none) header.from=andestech.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=ycliang@andestech.com Received: from mail.andestech.com (ATCPCS34.andestech.com [10.0.1.134]) by Atcsqr.andestech.com with ESMTPS id 4897mL1c033712 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128 verify=OK); Mon, 9 Sep 2024 15:48:21 +0800 (+08) (envelope-from ycliang@andestech.com) Received: from swlinux02 (10.0.15.183) by ATCPCS34.andestech.com (10.0.1.134) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Mon, 9 Sep 2024 15:48:22 +0800 Date: Mon, 9 Sep 2024 15:48:20 +0800 From: Leo Liang To: Jacky Chou CC: , , , , , , , , , Subject: Re: [PATCH] net: ftgmac100: Fixed the cache coherency issues of rx memory Message-ID: References: <20240627062600.3142388-1-jacky_chou@aspeedtech.com> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <20240627062600.3142388-1-jacky_chou@aspeedtech.com> User-Agent: Mutt/2.2.10 (e0e92c31) (2023-03-25) X-Originating-IP: [10.0.15.183] X-ClientProxiedBy: ATCPCS33.andestech.com (10.0.1.100) To ATCPCS34.andestech.com (10.0.1.134) X-DNSRBL: X-MAIL: Atcsqr.andestech.com 4897mL1c033712 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean On Thu, Jun 27, 2024 at 02:26:00PM +0800, Jacky Chou wrote: > When executing TFTP, the ARP will be replied to after receiving > the ARP. U-boot's ARP routine modifies the data in the receive > packet in response to the ARP packet and then copies it > into the transmit packet. > At this point, the received packet cache is inconsistent. > It is possible that the cache will perform a writeback action to > affect the MAC receiving packets. > > Avoid the same problem that occurs in other networking protocols. > In the free_pkt function, ensure cache and memory consistency. > > Signed-off-by: Jacky Chou > --- > drivers/net/ftgmac100.c | 8 ++++++++ > 1 file changed, 8 insertions(+) Acked-by: Leo Yu-Chi Liang