From: Oliver Upton <oliver.upton@linux.dev>
To: Shameerali Kolothum Thodi <shameerali.kolothum.thodi@huawei.com>
Cc: Marc Zyngier <maz@kernel.org>,
"kvmarm@lists.linux.dev" <kvmarm@lists.linux.dev>,
Sebastian Ott <sebott@redhat.com>,
James Morse <james.morse@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
yuzenghui <yuzenghui@huawei.com>,
"kvm@vger.kernel.org" <kvm@vger.kernel.org>,
Shaoqin Huang <shahuang@redhat.com>,
Eric Auger <eric.auger@redhat.com>,
"Wangzhou (B)" <wangzhou1@hisilicon.com>
Subject: Re: [PATCH v5 07/10] KVM: arm64: Treat CTR_EL0 as a VM feature ID register
Date: Mon, 9 Sep 2024 17:50:57 +0000 [thread overview]
Message-ID: <Zt81ga44ztdX_KET@linux.dev> (raw)
In-Reply-To: <8e361ab82d6c4adcb15890cd3cab48ee@huawei.com>
On Mon, Sep 09, 2024 at 05:16:55PM +0000, Shameerali Kolothum Thodi wrote:
> > > It should be safe, as a PIPT CMO always does at least the same as
> > > VIPT, and potentially more if there is aliasing.
> >
> > +1, there was no particular reason why this wasn't handled before.
> >
> > We should be careful to only allow userspace to select VIPT or PIPT (where
> > permissible), and not necessarily any value lower than what's reported by
> > hardware.
>
> VIPT 0b10
> PIPT 0b11
>
> Ok. Just to clarify that " not necessarily any value lower than what's reported by
> hardware" means userspace can set PIPT if hardware supports VIPT?
By that I meant we disallow userspace from selecting AIVIVT (0b01) and
VPIPT (0b00). The former is reserved in ARMv8, and I don't think anyone
has ever built the latter.
> Based on this,
> " If we have differing I-cache policies, report it as the weakest - VIPT." , I was thinking
> the other way around(see "safe to downgrade PIPT to VIPT"). But Marc also
> seems to suggest PIPT CMO ends up doing atleast same as VIPT and more, so it looks like
> the other way. If that's the case, what does that "report it as the weakest" means for host?
PIPT is the non-aliasing flavor of I$. Using a VIPT software model on
PIPT will lead to overinvalidating, but still correct. Cannot do it the
other way around.
--
Thanks,
Oliver
next prev parent reply other threads:[~2024-09-09 17:51 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-06-19 17:40 [PATCH v5 00/10] KVM: arm64: Allow userspace to modify CTR_EL0 Oliver Upton
2024-06-19 17:40 ` [PATCH v5 01/10] KVM: arm64: Get sys_reg encoding from descriptor in idregs_debug_show() Oliver Upton
2024-06-20 15:38 ` Sebastian Ott
2024-06-19 17:40 ` [PATCH v5 02/10] KVM: arm64: Make idregs debugfs iterator search sysreg table directly Oliver Upton
2024-06-20 15:41 ` Sebastian Ott
2024-06-19 17:40 ` [PATCH v5 03/10] KVM: arm64: Use read-only helper for reading VM ID registers Oliver Upton
2024-06-20 15:44 ` Sebastian Ott
2024-06-19 17:40 ` [PATCH v5 04/10] KVM: arm64: Add helper for writing ID regs Oliver Upton
2024-06-20 15:46 ` Sebastian Ott
2024-06-19 17:40 ` [PATCH v5 05/10] KVM: arm64: nv: Use accessors for modifying ID registers Oliver Upton
2024-06-19 17:40 ` [PATCH v5 06/10] KVM: arm64: unify code to prepare traps Oliver Upton
2024-06-19 17:40 ` [PATCH v5 07/10] KVM: arm64: Treat CTR_EL0 as a VM feature ID register Oliver Upton
2024-09-09 15:19 ` Shameerali Kolothum Thodi
2024-09-09 16:28 ` Marc Zyngier
2024-09-09 16:57 ` Oliver Upton
2024-09-09 17:16 ` Shameerali Kolothum Thodi
2024-09-09 17:50 ` Marc Zyngier
2024-09-09 17:55 ` Marc Zyngier
2024-09-09 17:50 ` Oliver Upton [this message]
2024-09-10 7:16 ` Shameerali Kolothum Thodi
2024-09-10 9:00 ` Marc Zyngier
2024-06-19 17:40 ` [PATCH v5 08/10] KVM: arm64: show writable masks for feature registers Oliver Upton
2024-06-19 17:40 ` [PATCH v5 09/10] KVM: arm64: rename functions for invariant sys regs Oliver Upton
2024-06-19 17:40 ` [PATCH v5 10/10] KVM: selftests: arm64: Test writes to CTR_EL0 Oliver Upton
2024-06-20 17:39 ` [PATCH v5 00/10] KVM: arm64: Allow userspace to modify CTR_EL0 Oliver Upton
2024-06-21 12:55 ` Sebastian Ott
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