From: Shawn Guo <shawnguo2@yeah.net>
To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Cc: Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Shawn Guo <shawnguo@kernel.org>,
Sascha Hauer <s.hauer@pengutronix.de>,
Pengutronix Kernel Team <kernel@pengutronix.de>,
Fabio Estevam <festevam@gmail.com>,
Michael Trimarchi <michael@amarulasolutions.com>,
Matteo Lisi <matteo.lisi@engicam.com>,
Jagan Teki <jagan@amarulasolutions.com>,
Parthiban Nallathambi <parthiban@linumiz.com>,
devicetree@vger.kernel.org, imx@lists.linux.dev,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, stable@vger.kernel.org
Subject: Re: [PATCH 1/2] ARM: dts: imx6ul-geam: fix fsl,pins property in tscgrp pinctrl
Date: Mon, 2 Sep 2024 08:55:53 +0800 [thread overview]
Message-ID: <ZtUNGdH3U4HbN2ok@dragon> (raw)
In-Reply-To: <20240831101129.15640-1-krzysztof.kozlowski@linaro.org>
On Sat, Aug 31, 2024 at 12:11:28PM +0200, Krzysztof Kozlowski wrote:
> The property is "fsl,pins", not "fsl,pin". Wrong property means the pin
> configuration was not applied. Fixes dtbs_check warnings:
>
> imx6ul-geam.dtb: pinctrl@20e0000: tscgrp: 'fsl,pins' is a required property
> imx6ul-geam.dtb: pinctrl@20e0000: tscgrp: 'fsl,pin' does not match any of the regexes: 'pinctrl-[0-9]+'
>
> Cc: <stable@vger.kernel.org>
> Fixes: a58e4e608bc8 ("ARM: dts: imx6ul-geam: Add Engicam IMX6UL GEA M6UL initial support")
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Applied both, thanks!
prev parent reply other threads:[~2024-09-02 0:57 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-08-31 10:11 [PATCH 1/2] ARM: dts: imx6ul-geam: fix fsl,pins property in tscgrp pinctrl Krzysztof Kozlowski
2024-08-31 10:11 ` [PATCH 2/2] ARM: dts: imx6ull-seeed-npi: " Krzysztof Kozlowski
2024-09-01 10:49 ` Parthiban
2024-08-31 10:15 ` [PATCH 1/2] ARM: dts: imx6ul-geam: " Michael Nazzareno Trimarchi
2024-09-02 0:55 ` Shawn Guo [this message]
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