From: Johan Hovold <johan@kernel.org>
To: manivannan.sadhasivam@linaro.org
Cc: "Richard Zhu" <hongxing.zhu@nxp.com>,
"Lucas Stach" <l.stach@pengutronix.de>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Rob Herring" <robh@kernel.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Shawn Guo" <shawnguo@kernel.org>,
"Sascha Hauer" <s.hauer@pengutronix.de>,
"Pengutronix Kernel Team" <kernel@pengutronix.de>,
"Fabio Estevam" <festevam@gmail.com>,
"Jingoo Han" <jingoohan1@gmail.com>,
"Chuanhua Lei" <lchuanhua@maxlinear.com>,
"Marek Vasut" <marek.vasut+renesas@gmail.com>,
"Yoshihiro Shimoda" <yoshihiro.shimoda.uh@renesas.com>,
"Pratyush Anand" <pratyush.anand@gmail.com>,
"Thierry Reding" <thierry.reding@gmail.com>,
"Jonathan Hunter" <jonathanh@nvidia.com>,
linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
imx@lists.linux.dev, linux-kernel@vger.kernel.org,
linux-renesas-soc@vger.kernel.org, linux-arm-msm@vger.kernel.org,
abel.vesa@linaro.org, johan+linaro@kernel.org,
"Shashank Babu Chinta Venkata" <quic_schintav@quicinc.com>,
linux-tegra@vger.kernel.org
Subject: Re: [PATCH v7 4/4] PCI: qcom: Add RX lane margining settings for 16.0 GT/s
Date: Thu, 12 Sep 2024 08:10:16 +0200 [thread overview]
Message-ID: <ZuKFyPBDZtocpkRr@hovoldconsulting.com> (raw)
In-Reply-To: <20240911-pci-qcom-gen4-stability-v7-4-743f5c1fd027@linaro.org>
On Wed, Sep 11, 2024 at 08:56:29PM +0530, Manivannan Sadhasivam via B4 Relay wrote:
> From: Shashank Babu Chinta Venkata <quic_schintav@quicinc.com>
>
> Add RX lane margining settings for 16.0 GT/s (GEN 4) data rate. These
> settings improve link stability while operating at high date rates and
> helps to improve signal quality.
>
> Signed-off-by: Shashank Babu Chinta Venkata <quic_schintav@quicinc.com>
> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
> [mani: dropped the code refactoring and minor changes]
> Tested-by: Johan Hovold <johan+linaro@kernel.org>
> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
next prev parent reply other threads:[~2024-09-12 6:09 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-09-11 15:26 [PATCH v7 0/4] PCI: qcom: Add 16.0 GT/s equalization and margining settings Manivannan Sadhasivam
2024-09-11 15:26 ` Manivannan Sadhasivam via B4 Relay
2024-09-11 15:26 ` [PATCH v7 1/4] PCI: dwc: Rename 'dw_pcie::link_gen' to 'dw_pcie::max_link_speed' Manivannan Sadhasivam
2024-09-11 15:26 ` Manivannan Sadhasivam via B4 Relay
2024-09-11 15:26 ` [PATCH v7 2/4] PCI: dwc: Always cache the maximum link speed value in dw_pcie::max_link_speed Manivannan Sadhasivam
2024-09-11 15:26 ` Manivannan Sadhasivam via B4 Relay
2024-09-11 15:26 ` [PATCH v7 3/4] PCI: qcom: Add equalization settings for 16.0 GT/s Manivannan Sadhasivam
2024-09-11 15:26 ` Manivannan Sadhasivam via B4 Relay
2024-09-12 6:08 ` Johan Hovold
2024-09-11 15:26 ` [PATCH v7 4/4] PCI: qcom: Add RX lane margining " Manivannan Sadhasivam
2024-09-11 15:26 ` Manivannan Sadhasivam via B4 Relay
2024-09-12 6:10 ` Johan Hovold [this message]
2024-09-12 6:25 ` [PATCH v7 0/4] PCI: qcom: Add 16.0 GT/s equalization and margining settings Johan Hovold
2024-09-12 6:35 ` Johan Hovold
2024-09-13 22:49 ` Krzysztof Wilczyński
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