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From: "Roger Pau Monné" <roger.pau@citrix.com>
To: Jan Beulich <jbeulich@suse.com>
Cc: alejandro.vallejo@cloud.com,
	Andrew Cooper <andrew.cooper3@citrix.com>,
	Julien Grall <julien@xen.org>,
	Stefano Stabellini <sstabellini@kernel.org>,
	xen-devel@lists.xenproject.org
Subject: Re: [PATCH 12/22] x86/spec-ctrl: introduce Address Space Isolation command line option
Date: Wed, 25 Sep 2024 17:27:54 +0200	[thread overview]
Message-ID: <ZvQr-n2gwWnWiJEW@macbook.local> (raw)
In-Reply-To: <49bd385d-f27a-4ca6-b0d2-56a458b44a84@suse.com>

On Wed, Sep 25, 2024 at 04:03:04PM +0200, Jan Beulich wrote:
> On 25.09.2024 15:31, Roger Pau Monné wrote:
> > On Wed, Aug 14, 2024 at 12:10:56PM +0200, Jan Beulich wrote:
> >> On 26.07.2024 17:21, Roger Pau Monne wrote:
> >>> --- a/docs/misc/xen-command-line.pandoc
> >>> +++ b/docs/misc/xen-command-line.pandoc
> >>> @@ -2387,7 +2387,7 @@ By default SSBD will be mitigated at runtime (i.e `ssbd=runtime`).
> >>>  
> >>>  ### spec-ctrl (x86)
> >>>  > `= List of [ <bool>, xen=<bool>, {pv,hvm}=<bool>,
> >>> ->              {msr-sc,rsb,verw,{ibpb,bhb}-entry}=<bool>|{pv,hvm}=<bool>,
> >>> +>              {msr-sc,rsb,verw,{ibpb,bhb}-entry,asi}=<bool>|{pv,hvm}=<bool>,
> >>
> >> Is it really appropriate to hide this underneath an x86-only option? Even
> >> of other architectures won't support it right away, they surely will want
> >> to down the road? In which case making as much of this common right away
> >> is probably the best we can do. This goes along with the question whether,
> >> like e.g. "xpti", this should be a top-level option.
> > 
> > I think it's better placed in spec-ctrl as it's a speculation
> > mitigation.
> 
> As is XPTI.

But XPTI predates the introduction of spec-ctrl option, I assumed
that's why xpti is not part of spec-ctrl.

> >  I can see your point about sharing with other arches,
> > maybe when that's needed we can introduce a generic parser of
> > spec-ctrl options?
> 
> Not sure how much could be generalized there.

Oh, so your point was not about sharing the parsing code, but sharing
the command line documentation about it, sorry, I missed that.

Along the lines of:

asi= boolean | { pv, hvm, hwdom }

Or similar?

Even then sub-options would likely be different between architectures.

> >>> @@ -143,6 +148,10 @@ static int __init cf_check parse_spec_ctrl(const char *s)
> >>>              opt_unpriv_mmio = false;
> >>>              opt_gds_mit = 0;
> >>>              opt_div_scrub = 0;
> >>> +
> >>> +            opt_asi_pv = 0;
> >>> +            opt_asi_hwdom = 0;
> >>> +            opt_asi_hvm = 0;
> >>>          }
> >>>          else if ( val > 0 )
> >>>              rc = -EINVAL;
> >>
> >> I'm frequently in trouble when deciding where the split between "=no" and
> >> "=xen" should be. opt_xpti_* are cleared ahead of the disable_common label;
> >> considering the similarity I wonder whether the same should be true for ASI
> >> (as this is also or even mainly about protecting guests from one another),
> >> or whether the XPTI placement is actually wrong.
> > 
> > Hm, that's a difficult one.  ASI is a Xen implemented mitigation, so
> > it should be turned off when spec-ctrl=no-xen is used according to the
> > description of the option:
> > 
> > "spec-ctrl=no-xen can be used to turn off all of Xen’s mitigations"
> 
> Meaning (aiui) mitigations to protect Xen itself.

So that would speculation attacks that take place in Xen context,
which is what ASI would protect against?

I don't have a strong opinion, but I also have a hard time seeing what
should `no-xen` disable.

> >>> @@ -378,6 +410,13 @@ int8_t __ro_after_init opt_xpti_domu = -1;
> >>>  
> >>>  static __init void xpti_init_default(void)
> >>>  {
> >>> +    ASSERT(opt_asi_pv >= 0 && opt_asi_hwdom >= 0);
> >>> +    if ( (opt_xpti_hwdom == 1 || opt_xpti_domu == 1) && opt_asi_pv == 1 )
> >>
> >> There is a separate opt_asi_hwdom which isn't used here, but only ...
> > 
> > opt_asi_pv (and opt_asi_hvm) must be set for opt_asi_hwdom to also be
> > set.  XPTI is sligtly different, in that XPTI could be set only for
> > the hwdom by using `xpti=dom0`.
> 
> Hmm, I didn't even notice this oddity (as it feels to me) in parsing.
> From the doc provided it wouldn't occur to me that e.g. "asi=pv" won't
> affect a PV Dom0. That's (iirc) specifically why "xpti=" has a "hwdom"
> sub-option.

It seems to be like that for all spec-ctrl options, see `bhb-entry`
for example.

> >>> @@ -643,22 +683,24 @@ static void __init print_details(enum ind_thunk thunk)
> >>>             opt_eager_fpu                             ? " EAGER_FPU"     : "",
> >>>             opt_verw_hvm                              ? " VERW"          : "",
> >>>             boot_cpu_has(X86_FEATURE_IBPB_ENTRY_HVM)  ? " IBPB-entry"    : "",
> >>> -           opt_bhb_entry_hvm                         ? " BHB-entry"     : "");
> >>> +           opt_bhb_entry_hvm                         ? " BHB-entry"     : "",
> >>> +           opt_asi_hvm                               ? " ASI"           : "");
> >>>  
> >>>  #endif
> >>>  #ifdef CONFIG_PV
> >>> -    printk("  Support for PV VMs:%s%s%s%s%s%s%s\n",
> >>> +    printk("  Support for PV VMs:%s%s%s%s%s%s%s%s\n",
> >>>             (boot_cpu_has(X86_FEATURE_SC_MSR_PV) ||
> >>>              boot_cpu_has(X86_FEATURE_SC_RSB_PV) ||
> >>>              boot_cpu_has(X86_FEATURE_IBPB_ENTRY_PV) ||
> >>> -            opt_bhb_entry_pv ||
> >>> +            opt_bhb_entry_pv || opt_asi_pv ||
> >>>              opt_eager_fpu || opt_verw_pv)            ? ""               : " None",
> >>>             boot_cpu_has(X86_FEATURE_SC_MSR_PV)       ? " MSR_SPEC_CTRL" : "",
> >>>             boot_cpu_has(X86_FEATURE_SC_RSB_PV)       ? " RSB"           : "",
> >>>             opt_eager_fpu                             ? " EAGER_FPU"     : "",
> >>>             opt_verw_pv                               ? " VERW"          : "",
> >>>             boot_cpu_has(X86_FEATURE_IBPB_ENTRY_PV)   ? " IBPB-entry"    : "",
> >>> -           opt_bhb_entry_pv                          ? " BHB-entry"     : "");
> >>> +           opt_bhb_entry_pv                          ? " BHB-entry"     : "",
> >>> +           opt_asi_pv                                ? " ASI"           : "");
> >>>  
> >>>      printk("  XPTI (64-bit PV only): Dom0 %s, DomU %s (with%s PCID)\n",
> >>>             opt_xpti_hwdom ? "enabled" : "disabled",
> >>
> >> Should this printk() perhaps be suppressed when ASI is in use?
> > 
> > Maybe, I found it useful during development to ensure the logic was
> > correct, but I guess it's not of much use for plain users.  I will
> > make the printing conditional to ASI not being uniformly enabled.
> > 
> > Maybe it would be useful to unify XPTI printing with the rest of
> > mitigations listed in the "Support for PV VMs:" line?  Albeit that
> > would drop the signaling of opt_xpti_hwdom.
> 
> Which is why I wouldn't want to "unify" it.

Right I will avoid printing the line if ASI is uniformly enabled.

Thanks, Roger.


  reply	other threads:[~2024-09-25 15:28 UTC|newest]

Thread overview: 64+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-07-26 15:21 [PATCH 00/22] x86: adventures in Address Space Isolation Roger Pau Monne
2024-07-26 15:21 ` [PATCH 01/22] x86/mm: drop l{1,2,3,4}e_write_atomic() Roger Pau Monne
2024-07-29  7:52   ` Jan Beulich
2024-07-29 12:53     ` Roger Pau Monné
2024-07-26 15:21 ` [PATCH 02/22] x86/mm: rename l{1,2,3,4}e_read_atomic() Roger Pau Monne
2024-07-29  7:53   ` Jan Beulich
2024-07-26 15:21 ` [PATCH 03/22] x86/dom0: only disable SMAP for the PV dom0 build Roger Pau Monne
2024-07-29  8:17   ` Roger Pau Monné
2024-07-29 11:53   ` Jan Beulich
2024-07-29 15:52     ` Andrew Cooper
2024-07-29 16:18       ` Roger Pau Monné
2024-07-29 17:51         ` Andrew Cooper
2024-07-30 10:55           ` Roger Pau Monné
2024-07-30 11:06             ` Andrew Cooper
2024-07-30 13:03               ` Roger Pau Monné
2024-07-29 15:59   ` Andrew Cooper
2024-07-29 16:32     ` Roger Pau Monné
2024-07-26 15:21 ` [PATCH 04/22] x86/mm: ensure L4 idle_pg_table is not modified past boot Roger Pau Monne
2024-08-13 15:54   ` Jan Beulich
2024-09-10  8:54     ` Roger Pau Monné
2024-09-10  9:00       ` Jan Beulich
2024-09-10  9:32         ` Roger Pau Monné
2024-07-26 15:21 ` [PATCH 05/22] x86/mm: make virt_to_xen_l1e() static Roger Pau Monne
2024-07-30 13:12   ` Andrew Cooper
2024-07-26 15:21 ` [PATCH 06/22] x86/mm: introduce a local domain variable to write_ptbase() Roger Pau Monne
2024-07-30 13:19   ` Andrew Cooper
2024-07-26 15:21 ` [PATCH 07/22] x86/spec-ctrl: initialize per-domain XPTI in spec_ctrl_init_domain() Roger Pau Monne
2024-08-14  9:47   ` Jan Beulich
2024-07-26 15:21 ` [PATCH 08/22] x86/mm: avoid passing a domain parameter to L4 init function Roger Pau Monne
2024-07-29 13:36   ` Alejandro Vallejo
2024-07-29 13:43     ` Jan Beulich
2024-07-29 14:18     ` Roger Pau Monné
2024-08-14 10:24   ` Jan Beulich
2024-07-26 15:21 ` [PATCH 09/22] x86/pv: untie issuing FLUSH_ROOT_PGTBL from XPTI Roger Pau Monne
2024-07-26 15:21 ` [PATCH 10/22] x86/mm: move FLUSH_ROOT_PGTBL handling before TLB flush Roger Pau Monne
2024-07-26 15:21 ` [PATCH 11/22] x86/mm: split setup of the per-domain slot on context switch Roger Pau Monne
2024-07-26 15:21 ` [PATCH 12/22] x86/spec-ctrl: introduce Address Space Isolation command line option Roger Pau Monne
2024-08-14 10:10   ` Jan Beulich
2024-09-25 13:31     ` Roger Pau Monné
2024-09-25 14:03       ` Jan Beulich
2024-09-25 15:27         ` Roger Pau Monné [this message]
2024-09-25 15:47           ` Jan Beulich
2024-07-26 15:21 ` [PATCH 13/22] x86/hvm: use a per-pCPU monitor table in HAP mode Roger Pau Monne
2024-08-16 18:02   ` Alejandro Vallejo
2024-08-19  8:29     ` Jan Beulich
2024-08-19 18:22     ` Alejandro Vallejo
2024-09-25 16:19     ` Roger Pau Monné
2024-07-26 15:21 ` [PATCH 14/22] x86/hvm: use a per-pCPU monitor table in shadow mode Roger Pau Monne
2024-07-26 15:21 ` [PATCH 15/22] x86/idle: allow using a per-pCPU L4 Roger Pau Monne
2024-08-21 16:42   ` Alejandro Vallejo
2024-09-27  9:29     ` Roger Pau Monné
2024-07-26 15:22 ` [PATCH 16/22] x86/mm: introduce a per-CPU L3 table for the per-domain slot Roger Pau Monne
2024-08-16 18:40   ` Alejandro Vallejo
2024-09-27  9:46     ` Roger Pau Monné
2024-07-26 15:22 ` [PATCH 17/22] x86/mm: introduce support to populate a per-CPU page-table region Roger Pau Monne
2024-07-26 15:22 ` [PATCH 18/22] x86/mm: allow modifying per-CPU entries of remote page-tables Roger Pau Monne
2024-07-26 15:22 ` [PATCH 19/22] x86/mm: introduce a per-CPU fixmap area Roger Pau Monne
2024-07-26 15:22 ` [PATCH 20/22] x86/pv: allow using a unique per-pCPU root page table (L4) Roger Pau Monne
2024-07-26 15:22 ` [PATCH 21/22] x86/mm: switch to a per-CPU mapped stack when using ASI Roger Pau Monne
2024-07-26 15:22 ` [PATCH 22/22] x86/mm: zero stack on stack switch or reset Roger Pau Monne
2024-07-29 15:40   ` Andrew Cooper
2024-07-30 10:49     ` Roger Pau Monné
2024-08-13 13:16   ` Jan Beulich
2024-09-27 10:22     ` Roger Pau Monné

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