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d="scan'208";a="31238712" Received: from fmviesa009.fm.intel.com ([10.60.135.149]) by orvoesa106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Oct 2024 04:45:26 -0700 X-CSE-ConnectionGUID: ScLS3KrURUWQ6QAUbYDBDQ== X-CSE-MsgGUID: Dca2mNFFQzGhm1/53s65IA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,184,1725346800"; d="scan'208";a="75455218" Received: from liuzhao-optiplex-7080.sh.intel.com (HELO localhost) ([10.239.160.36]) by fmviesa009.fm.intel.com with ESMTP; 07 Oct 2024 04:45:20 -0700 Date: Mon, 7 Oct 2024 20:01:32 +0800 From: Zhao Liu To: Alireza Sanaee Cc: qemu-devel@nongnu.org, qemu-arm@nongnu.org, zhenyu.z.wang@intel.com, dapeng1.mi@linux.intel.com, yongwei.ma@intel.com, armbru@redhat.com, farman@linux.ibm.com, peter.maydell@linaro.org, mst@redhat.com, anisinha@redhat.com, shannon.zhaosl@gmail.com, imammedo@redhat.com, mtosatti@redhat.com, berrange@redhat.com, richard.henderson@linaro.org, linuxarm@huwei.com, shameerali.kolothum.thodi@huawei.com, Jonathan.Cameron@huawei.com, jiangkunkun@huawei.comi, zhao1.liu@intel.com Subject: Re: [PATCH 2/5] i386/cpu: add IsDefined flag to smp-cache property Message-ID: References: <20240912133829.400-1-alireza.sanaee@huawei.com> <20240912133829.400-3-alireza.sanaee@huawei.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20240912133829.400-3-alireza.sanaee@huawei.com> Received-SPF: pass client-ip=198.175.65.14; envelope-from=zhao1.liu@intel.com; helo=mgamail.intel.com X-Spam_score_int: -45 X-Spam_score: -4.6 X-Spam_bar: ---- X-Spam_report: (-4.6 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.153, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-arm@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-arm-bounces+alex.bennee=linaro.org@nongnu.org Sender: qemu-arm-bounces+alex.bennee=linaro.org@nongnu.org X-TUID: pd6vZmB7VA7W Hi Ali, On Thu, Sep 12, 2024 at 02:38:26PM +0100, Alireza Sanaee wrote: > Date: Thu, 12 Sep 2024 14:38:26 +0100 > From: Alireza Sanaee > Subject: [PATCH 2/5] i386/cpu: add IsDefined flag to smp-cache property > X-Mailer: git-send-email 2.34.1 > > This commit adds IsDefined flag to the object and this helps in avoiding > extra checks for every single layer of caches in both x86 and ARM. > > Signed-off-by: Alireza Sanaee > --- > hw/core/machine-smp.c | 2 ++ > include/hw/boards.h | 1 + > 2 files changed, 3 insertions(+) > > diff --git a/hw/core/machine-smp.c b/hw/core/machine-smp.c > index 9a28194676..5a02bbf584 100644 > --- a/hw/core/machine-smp.c > +++ b/hw/core/machine-smp.c > @@ -371,6 +371,8 @@ bool machine_parse_smp_cache(MachineState *ms, > return false; > } > > + ms->smp_cache.IsDefined = true; > + > return true; > } > > diff --git a/include/hw/boards.h b/include/hw/boards.h > index db2aa2b706..2883a57084 100644 > --- a/include/hw/boards.h > +++ b/include/hw/boards.h > @@ -373,6 +373,7 @@ typedef struct CpuTopology { > > typedef struct SmpCache { > SmpCacheProperties props[CACHE_LEVEL_AND_TYPE__MAX]; > + bool IsDefined; > } SmpCache; Thanks! I'd add the flag "has_caches" in SMPCompatProps. I could pick this patch into my next version and remove my "TODO". :-) Regards, Zhao