From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
Cc: intel-gfx@lists.freedesktop.org, jani.nikula@intel.com,
ankit.k.nautiyal@intel.com, uma.shankar@intel.com,
animesh.manna@intel.com
Subject: Re: [PATCH v14 0/3] Vrr refactoring and panel replay workaround
Date: Wed, 16 Oct 2024 17:53:15 +0300 [thread overview]
Message-ID: <Zw_TW5eHx0Ke5xeb@intel.com> (raw)
In-Reply-To: <20241010040503.1795399-1-mitulkumar.ajitkumar.golani@intel.com>
On Thu, Oct 10, 2024 at 09:35:00AM +0530, Mitul Golani wrote:
> Refactor VRR compute config to account for Panel replay workaround
> for VSC SDP.
>
> Previous Patch series links:
> https://patchwork.freedesktop.org/series/135629/
> https://patchwork.freedesktop.org/series/135851/
> https://patchwork.freedesktop.org/series/138232/
>
> Animesh Manna (2):
> drm/i915/vrr: Split vrr-compute-config in two phases
> drm/i915/panelreplay: Panel replay workaround with VRR
>
> Mitul Golani (1):
> drm/i915/vrr: Add helper to check if vrr possible
Pushed to drm-intel-next. Thanks.
I fixed up a few minor issues (missing consts, redundant parens)
while pushing.
>
> drivers/gpu/drm/i915/display/intel_display.c | 18 ++++++++++++++++++
> drivers/gpu/drm/i915/display/intel_vrr.c | 20 +++++++++++++++-----
> drivers/gpu/drm/i915/display/intel_vrr.h | 2 ++
> 3 files changed, 35 insertions(+), 5 deletions(-)
>
> --
> 2.46.0
--
Ville Syrjälä
Intel
prev parent reply other threads:[~2024-10-16 14:56 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-10 4:05 [PATCH v14 0/3] Vrr refactoring and panel replay workaround Mitul Golani
2024-10-10 4:05 ` [PATCH v14 1/3] drm/i915/vrr: Add helper to check if vrr possible Mitul Golani
2024-10-10 4:05 ` [PATCH v14 2/3] drm/i915/vrr: Split vrr-compute-config in two phases Mitul Golani
2024-10-10 4:05 ` [PATCH v14 3/3] drm/i915/panelreplay: Panel replay workaround with VRR Mitul Golani
2024-10-10 4:47 ` ✗ Fi.CI.SPARSE: warning for Vrr refactoring and panel replay workaround (rev5) Patchwork
2024-10-10 4:56 ` ✓ Fi.CI.BAT: success " Patchwork
2024-10-11 10:15 ` ✗ Fi.CI.IGT: failure " Patchwork
2024-10-14 7:54 ` ✓ Fi.CI.IGT: success " Patchwork
2024-10-16 14:53 ` Ville Syrjälä [this message]
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