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X-CSE-ConnectionGUID: BQXH2AoGR0WjDGgXbew+6A== X-CSE-MsgGUID: 5+f8YqyDTQGMoHZL38SO0A== X-IronPort-AV: E=McAfee;i="6700,10204,11221"; a="50582143" X-IronPort-AV: E=Sophos;i="6.11,195,1725346800"; d="scan'208";a="50582143" Received: from orviesa004.jf.intel.com ([10.64.159.144]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Oct 2024 04:00:50 -0700 X-CSE-ConnectionGUID: njuZsZEOTqW+vRcqCaoGKQ== X-CSE-MsgGUID: cvcsFYMdQl+7ss1gQmeiOA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,195,1725346800"; d="scan'208";a="81878617" Received: from smile.fi.intel.com ([10.237.72.154]) by orviesa004.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Oct 2024 04:00:45 -0700 Received: from andy by smile.fi.intel.com with local (Exim 4.98) (envelope-from ) id 1szDNy-00000001rqO-0yOT; Fri, 11 Oct 2024 14:00:42 +0300 Date: Fri, 11 Oct 2024 14:00:41 +0300 From: Andy Shevchenko To: Tyrone Ting Cc: avifishman70@gmail.com, tmaimon77@gmail.com, tali.perry1@gmail.com, venture@google.com, yuenn@google.com, benjaminfair@google.com, andi.shyti@kernel.org, wsa@kernel.org, rand.sec96@gmail.com, wsa+renesas@sang-engineering.com, tali.perry@nuvoton.com, Avi.Fishman@nuvoton.com, tomer.maimon@nuvoton.com, KWLIU@nuvoton.com, JJLIU0@nuvoton.com, kfting@nuvoton.com, openbmc@lists.ozlabs.org, linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v6 2/4] i2c: npcm: Modify the client address assignment Message-ID: References: <20241011055231.9826-1-kfting@nuvoton.com> <20241011055231.9826-3-kfting@nuvoton.com> Precedence: bulk X-Mailing-List: linux-i2c@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20241011055231.9826-3-kfting@nuvoton.com> Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo On Fri, Oct 11, 2024 at 01:52:29PM +0800, Tyrone Ting wrote: > From: Tyrone Ting > > Store the client address earlier since it might get called in > the i2c_recover_bus() logic flow at the early stage of > npcm_i2c_master_xfer(). ... > + /* > + * Previously, the address was stored w/o left-shift by one bit and > + * with that shift in the following call to npcm_i2c_master_start_xmit(). > + * > + * Since there are cases that the i2c_recover_bus() gets called at the > + * early stage of npcm_i2c_master_xfer(), the address is stored with > + * the shift and used in the i2c_recover_bus(). > + * > + * The address is stored from bit 1 to bit 7 in the register for > + * sending the i2c address later so it's left-shifted by 1 bit. > + */ I would rephrase it a bit like /* * Previously, the 7-bit address was stored and being converted to * the address of event in the following call to npcm_i2c_master_start_xmit(). * * Since there are cases that the i2c_recover_bus() gets called at the * early stage of npcm_i2c_master_xfer(), the address of event is stored * and then used in the i2c_recover_bus(). */ (E.g., the last paragraph just describes 101 about I2C 7-bit addresses usage and may be dropped completely.) > + bus->dest_addr = i2c_8bit_addr_from_msg(msg0); ... > + /* > + * Since the transfer might be a read operation, remove the I2C_M_RD flag > + * from the bus->dest_addr for the i2c_recover_bus() call later. > + * > + * The i2c_recover_bus() uses the address in a write direction to recover > + * the i2c bus if some error condition occurs. > + */ > + if (bus->dest_addr & I2C_M_RD) Redundant. > + bus->dest_addr &= ~I2C_M_RD; -- With Best Regards, Andy Shevchenko From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.ozlabs.org (lists.ozlabs.org [112.213.38.117]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 05BADCFD342 for ; Fri, 11 Oct 2024 11:01:15 +0000 (UTC) Received: from boromir.ozlabs.org (localhost [IPv6:::1]) by lists.ozlabs.org (Postfix) with ESMTP id 4XQ3Zk6X0bz3clK for ; Fri, 11 Oct 2024 22:01:02 +1100 (AEDT) Authentication-Results: lists.ozlabs.org; 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d="scan'208";a="81878617" Received: from smile.fi.intel.com ([10.237.72.154]) by orviesa004.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Oct 2024 04:00:45 -0700 Received: from andy by smile.fi.intel.com with local (Exim 4.98) (envelope-from ) id 1szDNy-00000001rqO-0yOT; Fri, 11 Oct 2024 14:00:42 +0300 Date: Fri, 11 Oct 2024 14:00:41 +0300 From: Andy Shevchenko To: Tyrone Ting Subject: Re: [PATCH v6 2/4] i2c: npcm: Modify the client address assignment Message-ID: References: <20241011055231.9826-1-kfting@nuvoton.com> <20241011055231.9826-3-kfting@nuvoton.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20241011055231.9826-3-kfting@nuvoton.com> Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: openbmc@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Development list for OpenBMC List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: KWLIU@nuvoton.com, tomer.maimon@nuvoton.com, linux-kernel@vger.kernel.org, benjaminfair@google.com, wsa+renesas@sang-engineering.com, avifishman70@gmail.com, venture@google.com, openbmc@lists.ozlabs.org, kfting@nuvoton.com, JJLIU0@nuvoton.com, tali.perry@nuvoton.com, tali.perry1@gmail.com, wsa@kernel.org, andi.shyti@kernel.org, linux-i2c@vger.kernel.org, Avi.Fishman@nuvoton.com, rand.sec96@gmail.com, tmaimon77@gmail.com Errors-To: openbmc-bounces+openbmc=archiver.kernel.org@lists.ozlabs.org Sender: "openbmc" On Fri, Oct 11, 2024 at 01:52:29PM +0800, Tyrone Ting wrote: > From: Tyrone Ting > > Store the client address earlier since it might get called in > the i2c_recover_bus() logic flow at the early stage of > npcm_i2c_master_xfer(). ... > + /* > + * Previously, the address was stored w/o left-shift by one bit and > + * with that shift in the following call to npcm_i2c_master_start_xmit(). > + * > + * Since there are cases that the i2c_recover_bus() gets called at the > + * early stage of npcm_i2c_master_xfer(), the address is stored with > + * the shift and used in the i2c_recover_bus(). > + * > + * The address is stored from bit 1 to bit 7 in the register for > + * sending the i2c address later so it's left-shifted by 1 bit. > + */ I would rephrase it a bit like /* * Previously, the 7-bit address was stored and being converted to * the address of event in the following call to npcm_i2c_master_start_xmit(). * * Since there are cases that the i2c_recover_bus() gets called at the * early stage of npcm_i2c_master_xfer(), the address of event is stored * and then used in the i2c_recover_bus(). */ (E.g., the last paragraph just describes 101 about I2C 7-bit addresses usage and may be dropped completely.) > + bus->dest_addr = i2c_8bit_addr_from_msg(msg0); ... > + /* > + * Since the transfer might be a read operation, remove the I2C_M_RD flag > + * from the bus->dest_addr for the i2c_recover_bus() call later. > + * > + * The i2c_recover_bus() uses the address in a write direction to recover > + * the i2c bus if some error condition occurs. > + */ > + if (bus->dest_addr & I2C_M_RD) Redundant. > + bus->dest_addr &= ~I2C_M_RD; -- With Best Regards, Andy Shevchenko