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d="scan'208";a="32035181" Received: from fmviesa002.fm.intel.com ([10.60.135.142]) by fmvoesa106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Oct 2024 02:34:17 -0700 X-CSE-ConnectionGUID: 7HZvLXW6TW2XeCQk17lw4A== X-CSE-MsgGUID: nMhM8DDBQJ6KW6YEML4x9A== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,198,1725346800"; d="scan'208";a="100447434" Received: from liuzhao-optiplex-7080.sh.intel.com (HELO localhost) ([10.239.160.36]) by fmviesa002.fm.intel.com with ESMTP; 12 Oct 2024 02:34:13 -0700 Date: Sat, 12 Oct 2024 17:50:26 +0800 From: Zhao Liu To: Alireza Sanaee Cc: qemu-devel@nongnu.org, qemu-arm@nongnu.org, zhenyu.z.wang@intel.com, dapeng1.mi@linux.intel.com, yongwei.ma@intel.com, armbru@redhat.com, farman@linux.ibm.com, peter.maydell@linaro.org, mst@redhat.com, anisinha@redhat.com, shannon.zhaosl@gmail.com, imammedo@redhat.com, mtosatti@redhat.com, berrange@redhat.com, richard.henderson@linaro.org, linuxarm@huawei.com, shameerali.kolothum.thodi@huawei.com, Jonathan.Cameron@huawei.com, jiangkunkun@huawei.com, yangyicong@hisilicon.com Subject: Re: [PATCH v3 2/6] i386/cpu: add IsDefined flag to smp-cache property Message-ID: References: <20241010111822.345-1-alireza.sanaee@huawei.com> <20241010111822.345-3-alireza.sanaee@huawei.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20241010111822.345-3-alireza.sanaee@huawei.com> Received-SPF: pass client-ip=192.198.163.12; envelope-from=zhao1.liu@intel.com; helo=mgamail.intel.com X-Spam_score_int: -44 X-Spam_score: -4.5 X-Spam_bar: ---- X-Spam_report: (-4.5 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.15, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-arm@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-arm-bounces+alex.bennee=linaro.org@nongnu.org Sender: qemu-arm-bounces+alex.bennee=linaro.org@nongnu.org X-TUID: SRpi20dW0OtB Hi Alireze, On Thu, Oct 10, 2024 at 12:18:18PM +0100, Alireza Sanaee wrote: > Date: Thu, 10 Oct 2024 12:18:18 +0100 > From: Alireza Sanaee > Subject: [PATCH v3 2/6] i386/cpu: add IsDefined flag to smp-cache property > X-Mailer: git-send-email 2.34.1 > > This commit adds IsDefined flag to the object and this helps in avoiding > extra checks for every single layer of caches in both x86 and ARM. > > Signed-off-by: Alireza Sanaee > --- > hw/core/machine-smp.c | 2 ++ > include/hw/boards.h | 1 + > 2 files changed, 3 insertions(+) > > diff --git a/hw/core/machine-smp.c b/hw/core/machine-smp.c > index 9a28194676..5a02bbf584 100644 > --- a/hw/core/machine-smp.c > +++ b/hw/core/machine-smp.c > @@ -371,6 +371,8 @@ bool machine_parse_smp_cache(MachineState *ms, > return false; > } > > + ms->smp_cache.IsDefined = true; > + > return true; > } > > diff --git a/include/hw/boards.h b/include/hw/boards.h > index db2aa2b706..2883a57084 100644 > --- a/include/hw/boards.h > +++ b/include/hw/boards.h > @@ -373,6 +373,7 @@ typedef struct CpuTopology { > > typedef struct SmpCache { > SmpCacheProperties props[CACHE_LEVEL_AND_TYPE__MAX]; > + bool IsDefined; > } SmpCache; > > /** Thanks for your patch, now I've added this commit in my series to resolve my TODO, which can also help your series be more ARM-focused :). I will post my next version soon. Thanks, Zhao