From: Catalin Marinas <catalin.marinas@arm.com>
To: Yicong Yang <yangyicong@huawei.com>
Cc: will@kernel.org, yangyicong@hisilicon.com, maz@kernel.org,
mark.rutland@arm.com, broonie@kernel.org,
linux-arm-kernel@lists.infradead.org, oliver.upton@linux.dev,
ryan.roberts@arm.com, linuxarm@huawei.com,
jonathan.cameron@huawei.com,
shameerali.kolothum.thodi@huawei.com, prime.zeng@hisilicon.com,
xuwei5@huawei.com, wangkefeng.wang@huawei.com
Subject: Re: [PATCH v3 3/5] arm64: Add support for FEAT_HAFT
Date: Mon, 28 Oct 2024 18:33:59 +0000 [thread overview]
Message-ID: <Zx_ZFwbDUtuDtfmc@arm.com> (raw)
In-Reply-To: <5b31a644-1eac-46de-6212-d2733234814b@huawei.com>
On Thu, Oct 24, 2024 at 10:45:51PM +0800, Yicong Yang wrote:
> On 2024/10/23 20:36, Catalin Marinas wrote:
> > On Wed, Oct 23, 2024 at 06:30:18PM +0800, Yicong Yang wrote:
> >> On 2024/10/23 2:30, Catalin Marinas wrote:
> >>> On Tue, Oct 22, 2024 at 05:27:32PM +0800, Yicong Yang wrote:
> >>>> +#ifdef CONFIG_ARM64_HAFT
> >>>> + {
> >>>> + .desc = "Hardware managed Access Flag for Table Descriptor",
> >>>> + .type = ARM64_CPUCAP_WEAK_LOCAL_CPU_FEATURE,
> >>>
> >>> I'd actually use ARM64_CPUCAP_SYSTEM_FEATURE here. We use something
> >>> similar for HW DBM but there we get a fault and set the pte dirty. You
> >>> combined it with a system_support_haft() that checks the sanitised regs
> >>> but I'd rather have a static branch check via cpus_have_cap(). Even with
> >>> your approach we can have a race with a late CPU hot-plugged that
> >>> doesn't have the feature in the middle of some core code walking the
> >>> page tables.
> >>>
> >>> With a system feature type, late CPUs not having the feature won't be
> >>> brought online (if feature enabled) but in general I don't have much
> >>> sympathy for SoC vendors combining CPUs with incompatible features ;).
> >>
> >> ok. If we make it a system feature, we can using cpus_have_cap() then and
> >> drop the system_support_haft() which is checking with the sanitised registers.
> >> It's fine for me.
> >>
> >> Will ask to not refuse online a CPU due to mismatch of this feature in [1],
> >> hope we have an agreement :)
> >>
> >> [1] https://lore.kernel.org/linux-arm-kernel/20240820161822.GC28750@willie-the-truck/
> >
> > I initially thought this would work but I don't feel easy about having
> > should_clear_pmd_young() change its polarity at runtime while user space
> > is running. If that's not a problem, we can go with your current
> > approach.
>
> this should be ok as I image. after online a CPU without HAFT the system won't
> advertise HAFT support but we don't disable the HAFT update on the supported
> CPUs, the ongoing page aging process can still use the updated table AF information
> and later process will fallback to use the PTE's AF bit. efficiency maybe reduced
> but the function should be correct.
It's more of a theoretical case - walk_pmd_range() for example checks
should_clear_pmd_young() followed by !pmd_young(). Between these two
checks, should_clear_pmd_young() becomes false but the pmd may have been
accessed by a CPU without HAFT. We'd miss this. However, such race is
benign I think, only used for page aging so it shouldn't matter.
The other thing with your approach is the cost of checking (load, mask,
compare) vs just a static branch. Given that it's only done for pmds,
it's probably lost in the noise but you could check it to be sure.
--
Catalin
next prev parent reply other threads:[~2024-10-28 18:35 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-22 9:27 [PATCH v3 0/5] Support Armv8.9/v9.4 FEAT_HAFT Yicong Yang
2024-10-22 9:27 ` [PATCH v3 1/5] arm64/sysreg: Update ID_AA64MMFR1_EL1 register Yicong Yang
2024-10-22 17:05 ` Mark Brown
2024-10-23 10:06 ` Yicong Yang
2024-10-22 9:27 ` [PATCH v3 2/5] arm64: setup: name 'tcr2' register Yicong Yang
2024-10-22 16:54 ` Catalin Marinas
2024-10-23 10:08 ` Yicong Yang
2024-10-22 9:27 ` [PATCH v3 3/5] arm64: Add support for FEAT_HAFT Yicong Yang
2024-10-22 18:30 ` Catalin Marinas
2024-10-23 10:30 ` Yicong Yang
2024-10-23 12:36 ` Catalin Marinas
2024-10-24 14:45 ` Yicong Yang
2024-10-24 15:23 ` Yicong Yang
2024-10-28 18:33 ` Catalin Marinas [this message]
2024-10-22 9:27 ` [PATCH v3 4/5] arm64: Enable ARCH_HAS_NONLEAF_PMD_YOUNG Yicong Yang
2024-10-22 9:27 ` [PATCH v3 5/5] arm64: pgtable: Warn unexpected pmdp_test_and_clear_young() Yicong Yang
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=Zx_ZFwbDUtuDtfmc@arm.com \
--to=catalin.marinas@arm.com \
--cc=broonie@kernel.org \
--cc=jonathan.cameron@huawei.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linuxarm@huawei.com \
--cc=mark.rutland@arm.com \
--cc=maz@kernel.org \
--cc=oliver.upton@linux.dev \
--cc=prime.zeng@hisilicon.com \
--cc=ryan.roberts@arm.com \
--cc=shameerali.kolothum.thodi@huawei.com \
--cc=wangkefeng.wang@huawei.com \
--cc=will@kernel.org \
--cc=xuwei5@huawei.com \
--cc=yangyicong@hisilicon.com \
--cc=yangyicong@huawei.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.