From: "Gautham R. Shenoy" <gautham.shenoy@amd.com>
To: Mario Limonciello <mario.limonciello@amd.com>
Cc: Borislav Petkov <bp@alien8.de>,
Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>,
Dave Hansen <dave.hansen@linux.intel.com>,
"maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT)"
<x86@kernel.org>, "H . Peter Anvin" <hpa@zytor.com>,
"Rafael J . Wysocki" <rafael@kernel.org>,
Perry Yuan <perry.yuan@amd.com>,
Brijesh Singh <brijesh.singh@amd.com>,
Peter Zijlstra <peterz@infradead.org>,
Li RongQing <lirongqing@baidu.com>,
"open list:X86 ARCHITECTURE (32-BIT AND 64-BIT)"
<linux-kernel@vger.kernel.org>,
"open list:ACPI" <linux-acpi@vger.kernel.org>,
"open list:AMD PSTATE DRIVER" <linux-pm@vger.kernel.org>,
Pawan Gupta <pawan.kumar.gupta@linux.intel.com>
Subject: Re: [PATCH v2 3/5] x86/cpu: Enable SD_ASYM_PACKING for PKG Domain on AMD Processors
Date: Tue, 22 Oct 2024 14:50:54 +0530 [thread overview]
Message-ID: <Zxdudu1tpCbNvm1d@BLRRASHENOY1.amd.com> (raw)
In-Reply-To: <20241022034608.32396-4-mario.limonciello@amd.com>
On Mon, Oct 21, 2024 at 10:46:06PM -0500, Mario Limonciello wrote:
> From: Perry Yuan <perry.yuan@amd.com>
>
> Enable the SD_ASYM_PACKING domain flag for the PKG domain on AMD
> heterogeneous processors.
> This flag is beneficial for processors with one or more CCDs and
> relies on x86_sched_itmt_flags().
>
> Signed-off-by: Perry Yuan <perry.yuan@amd.com>
> Co-developed-by: Mario Limonciello <mario.limonciello@amd.com>
> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
Reviewed-by: Gautham R. Shenoy <gautham.shenoy@amd.com>
> ---
> arch/x86/kernel/smpboot.c | 5 +++--
> 1 file changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c
> index 766f092dab80b..b5a8f0891135b 100644
> --- a/arch/x86/kernel/smpboot.c
> +++ b/arch/x86/kernel/smpboot.c
> @@ -497,8 +497,9 @@ static int x86_cluster_flags(void)
>
> static int x86_die_flags(void)
> {
> - if (cpu_feature_enabled(X86_FEATURE_HYBRID_CPU))
> - return x86_sched_itmt_flags();
> + if (cpu_feature_enabled(X86_FEATURE_HYBRID_CPU) ||
> + cpu_feature_enabled(X86_FEATURE_AMD_HETEROGENEOUS_CORES))
> + return x86_sched_itmt_flags();
>
> return 0;
> }
> --
> 2.43.0
>
next prev parent reply other threads:[~2024-10-22 9:21 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-22 3:46 [PATCH v2 0/5] x86 Heterogeneous design identification Mario Limonciello
2024-10-22 3:46 ` [PATCH v2 1/5] x86/cpufeatures: Rename X86_FEATURE_FAST_CPPC to have AMD prefix Mario Limonciello
2024-10-22 3:46 ` [PATCH v2 2/5] x86/cpufeatures: Add feature bits for AMD heterogeneous processor Mario Limonciello
2024-10-22 3:46 ` [PATCH v2 3/5] x86/cpu: Enable SD_ASYM_PACKING for PKG Domain on AMD Processors Mario Limonciello
2024-10-22 9:20 ` Gautham R. Shenoy [this message]
2024-10-22 3:46 ` [PATCH v2 4/5] x86/cpu: Add CPU type to struct cpuinfo_topology Mario Limonciello
2024-10-22 11:57 ` Borislav Petkov
2024-10-22 12:03 ` Borislav Petkov
2024-10-22 15:41 ` Mario Limonciello
2024-10-22 16:03 ` Dave Hansen
2024-10-22 16:13 ` Mario Limonciello
2024-10-22 17:09 ` Dave Hansen
2024-10-23 3:58 ` Pawan Gupta
2024-10-23 4:40 ` Pawan Gupta
2024-10-23 15:59 ` Borislav Petkov
2024-10-22 3:46 ` [PATCH v2 5/5] x86/amd: Use heterogeneous core topology for identifying boost numerator Mario Limonciello
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