From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Imre Deak <imre.deak@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH v3 3/8] drm/i915/dp: Initialize the source OUI write timestamp always
Date: Wed, 23 Oct 2024 15:15:29 +0300 [thread overview]
Message-ID: <Zxjo4QC_mAXTFsWF@intel.com> (raw)
In-Reply-To: <20241016132405.2231744-4-imre.deak@intel.com>
On Wed, Oct 16, 2024 at 04:24:00PM +0300, Imre Deak wrote:
> If the source OUI DPCD register value matches the expected Intel OUI
> value, the write timestamp doesn't get updated leaving it at the 0
> initial value if the OUI wasn't written before. This can lead to an
> incorrect wait duration in intel_dp_wait_source_oui(), since jiffies is
> not inited to 0 in general (on a 32 bit system INITIAL_JIFFIES is set to
> 5 minutes ahead of wrap-around). Fix this by intializing the write
> timestamp in the above case as well.
>
> Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_dp.c | 5 ++++-
> 1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 3da06d25bc4ef..0b9981f7f1a68 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -3414,8 +3414,11 @@ intel_edp_init_source_oui(struct intel_dp *intel_dp, bool careful)
> if (drm_dp_dpcd_read(&intel_dp->aux, DP_SOURCE_OUI, buf, sizeof(buf)) < 0)
> drm_err(&i915->drm, "Failed to read source OUI\n");
>
> - if (memcmp(oui, buf, sizeof(oui)) == 0)
> + if (memcmp(oui, buf, sizeof(oui)) == 0) {
> + /* Assume the OUI was written now. */
> + intel_dp->last_oui_write = jiffies;
> return;
> + }
> }
>
> if (drm_dp_dpcd_write(&intel_dp->aux, DP_SOURCE_OUI, oui, sizeof(oui)) < 0)
> --
> 2.44.2
--
Ville Syrjälä
Intel
next prev parent reply other threads:[~2024-10-23 12:15 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-16 13:23 [PATCH v3 0/8] drm/i915: Write source OUI for non-eDP sinks Imre Deak
2024-10-16 13:23 ` [PATCH v3 1/8] drm/i915/dp: Flush modeset commits during connector detection Imre Deak
2024-10-23 12:15 ` Ville Syrjälä
2024-10-23 14:19 ` Imre Deak
2024-10-16 13:23 ` [PATCH v3 2/8] drm/i915/dp: Ensure panel power remains enabled " Imre Deak
2024-10-23 12:43 ` Ville Syrjälä
2024-10-23 15:19 ` Jani Nikula
2024-10-23 15:48 ` Imre Deak
2024-10-16 13:24 ` [PATCH v3 3/8] drm/i915/dp: Initialize the source OUI write timestamp always Imre Deak
2024-10-23 12:15 ` Ville Syrjälä [this message]
2024-10-16 13:24 ` [PATCH v3 4/8] drm/i915/dp: Track source OUI validity explicitly Imre Deak
2024-10-22 9:46 ` [PATCH v4 " Imre Deak
2024-10-23 12:16 ` Ville Syrjälä
2024-10-23 14:40 ` Imre Deak
2024-10-25 7:18 ` Ville Syrjälä
2024-10-16 13:24 ` [PATCH v3 5/8] drm/i915/dp: Reuse intel_dp_detect_dsc_caps() for eDP Imre Deak
2024-10-23 12:15 ` Ville Syrjälä
2024-10-16 13:24 ` [PATCH v3 6/8] drm/i915/dp: Write the source OUI for eDP before detecting sink capabilities Imre Deak
2024-10-23 12:15 ` Ville Syrjälä
2024-10-16 13:24 ` [PATCH v3 7/8] drm/i915/dp: Write the source OUI during connector detection Imre Deak
2024-10-23 12:46 ` Ville Syrjälä
2024-10-16 13:24 ` [PATCH v3 8/8] drm/i915/dp: Write the source OUI for non-eDP sinks as well Imre Deak
2024-10-22 9:46 ` [PATCH v4 " Imre Deak
2024-10-16 19:12 ` ✗ Fi.CI.SPARSE: warning for drm/i915: Write source OUI for non-eDP sinks Patchwork
2024-10-16 19:12 ` ✓ Fi.CI.BAT: success " Patchwork
2024-10-16 20:48 ` ✗ Fi.CI.IGT: failure " Patchwork
2024-10-22 12:21 ` ✗ Fi.CI.SPARSE: warning for drm/i915: Write source OUI for non-eDP sinks (rev3) Patchwork
2024-10-22 12:27 ` ✗ Fi.CI.BAT: failure " Patchwork
2024-10-22 13:04 ` Imre Deak
2024-10-22 13:25 ` Imre Deak
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