From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DE2FD23D7; Wed, 30 Oct 2024 00:37:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730248645; cv=none; b=JgjFwd4aEY8BOhADPdstUA++MLz+ZTo4Q4JmjpZhBXIwBubPk+Y2qxFeXPTEtAo7GwPomzRNIHjGBe+h8XJBeC6eweNZrVJUFDCzqp6MsvMWhNF1rnuDGWlJ4SqL61AXM0ws6yBCdiezYEcCXS9vgWoYOihZ29LI2QZVZtHBmpo= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730248645; c=relaxed/simple; bh=dURTOXL4P+eY/enOSnmceDVRo9KrseqCoeA8XcVElsw=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=GAeFPuOdulHYx5N6VyewoOH2xdhcoUORzU1HhBEgVmJzFWEuvBXUDtj5/qPUaUIGx5eX+dVk8bhMcRkev18NLx+Q0g3EnKBsbLJtV56zCg8+WlLXVe74kNNYcS5o0okjjk2+5tOn1r+RhZHW5AhznNM4zLmDEjxgabart3NrbXs= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=DRYqBTHJ; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="DRYqBTHJ" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 15805C4CECD; Wed, 30 Oct 2024 00:37:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1730248644; bh=dURTOXL4P+eY/enOSnmceDVRo9KrseqCoeA8XcVElsw=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=DRYqBTHJDng3XM4VBRR//2H+o0boZztE1JfVhqL9YY4GKxjDx/nWR6KWvIIUERLeZ sRW6yI7bY8det+O1IYT5KkWYqOwBQLovqgvgcFTIDd3GfbjYwjKldfq9IKnw4psTpC YMMk9wuQQuEhSj8v2ODLbRFCPsE4juPq6vSCk4wdPIlIykUuV6eBpa1caMlYMUXkfC 7g8FV7oWRgekYKhcRW0h4FN7m5nFd+ZXlHhUTdetgBZYtM9SCGd2eGGLteTVwFAd1W q2sXlUERkwzIVZqeL55dyGZDao2P75xQfVw+eVXm1LS6aeWEtRiuR6FNAiSVlN6wPL WGIxx/cxxIYXg== Date: Tue, 29 Oct 2024 17:37:22 -0700 From: Namhyung Kim To: =?utf-8?B?QmrDtnJuIFTDtnBlbA==?= Cc: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Mark Rutland , Alexander Shishkin , Jiri Olsa , Ian Rogers , Adrian Hunter , "Liang, Kan" , linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, linux-riscv@lists.infradead.org, =?utf-8?B?QmrDtnJuIFTDtnBlbA==?= , Paul Walmsley , Palmer Dabbelt , Albert Ou , Anup Patel , Atish Patra Subject: Re: [PATCH] perf, riscv: Wire up perf trace support for RISC-V Message-ID: References: <20241024190353.46737-1-bjorn@kernel.org> Precedence: bulk X-Mailing-List: linux-perf-users@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20241024190353.46737-1-bjorn@kernel.org> Hello, On Thu, Oct 24, 2024 at 12:03:51PM -0700, Björn Töpel wrote: > From: Björn Töpel > > RISC-V does not currently support perf trace, since the system call > table is not generated. > > Perform the copy/paste exercise, wiring up RISC-V system call table > generation. Can anybody with RISC-V please test this? Thanks, Namhyung > > Signed-off-by: Björn Töpel > --- > tools/perf/Makefile.config | 6 ++- > tools/perf/arch/riscv/Makefile | 22 +++++++++ > .../arch/riscv/entry/syscalls/mksyscalltbl | 47 +++++++++++++++++++ > tools/perf/util/syscalltbl.c | 4 ++ > 4 files changed, 78 insertions(+), 1 deletion(-) > create mode 100755 tools/perf/arch/riscv/entry/syscalls/mksyscalltbl > > diff --git a/tools/perf/Makefile.config b/tools/perf/Makefile.config > index 4ddb27a48eed..1d388e71e0cc 100644 > --- a/tools/perf/Makefile.config > +++ b/tools/perf/Makefile.config > @@ -31,7 +31,7 @@ $(call detected_var,SRCARCH) > ifneq ($(NO_SYSCALL_TABLE),1) > NO_SYSCALL_TABLE := 1 > > - ifeq ($(SRCARCH),$(filter $(SRCARCH),x86 powerpc arm64 s390 mips loongarch)) > + ifeq ($(SRCARCH),$(filter $(SRCARCH),x86 powerpc arm64 s390 mips loongarch riscv)) > NO_SYSCALL_TABLE := 0 > endif > > @@ -83,6 +83,10 @@ ifeq ($(ARCH),mips) > LIBUNWIND_LIBS = -lunwind -lunwind-mips > endif > > +ifeq ($(ARCH),riscv) > + CFLAGS += -I$(OUTPUT)arch/riscv/include/generated > +endif > + > # So far there's only x86 and arm libdw unwind support merged in perf. > # Disable it on all other architectures in case libdw unwind > # support is detected in system. Add supported architectures > diff --git a/tools/perf/arch/riscv/Makefile b/tools/perf/arch/riscv/Makefile > index 90c3c476a242..481da4518695 100644 > --- a/tools/perf/arch/riscv/Makefile > +++ b/tools/perf/arch/riscv/Makefile > @@ -4,3 +4,25 @@ endif > PERF_HAVE_ARCH_REGS_QUERY_REGISTER_OFFSET := 1 > PERF_HAVE_JITDUMP := 1 > HAVE_KVM_STAT_SUPPORT := 1 > + > +# > +# Syscall table generation for perf > +# > + > +out := $(OUTPUT)arch/riscv/include/generated/asm > +header := $(out)/syscalls.c > +incpath := $(srctree)/tools > +sysdef := $(srctree)/tools/arch/riscv/include/uapi/asm/unistd.h > +sysprf := $(srctree)/tools/perf/arch/riscv/entry/syscalls/ > +systbl := $(sysprf)/mksyscalltbl > + > +# Create output directory if not already present > +$(shell [ -d '$(out)' ] || mkdir -p '$(out)') > + > +$(header): $(sysdef) $(systbl) > + $(Q)$(SHELL) '$(systbl)' '$(CC)' '$(HOSTCC)' $(incpath) $(sysdef) > $@ > + > +clean:: > + $(call QUIET_CLEAN, riscv) $(RM) $(header) > + > +archheaders: $(header) > diff --git a/tools/perf/arch/riscv/entry/syscalls/mksyscalltbl b/tools/perf/arch/riscv/entry/syscalls/mksyscalltbl > new file mode 100755 > index 000000000000..c59f5e852b97 > --- /dev/null > +++ b/tools/perf/arch/riscv/entry/syscalls/mksyscalltbl > @@ -0,0 +1,47 @@ > +#!/bin/sh > +# SPDX-License-Identifier: GPL-2.0 > +# > +# Generate system call table for perf. Derived from > +# powerpc script. > +# > +# Copyright IBM Corp. 2017 > +# Author(s): Hendrik Brueckner > +# Changed by: Ravi Bangoria > +# Changed by: Kim Phillips > +# Changed by: Björn Töpel > + > +gcc=$1 > +hostcc=$2 > +incpath=$3 > +input=$4 > + > +if ! test -r $input; then > + echo "Could not read input file" >&2 > + exit 1 > +fi > + > +create_sc_table() > +{ > + local sc nr max_nr > + > + while read sc nr; do > + printf "%s\n" " [$nr] = \"$sc\"," > + max_nr=$nr > + done > + > + echo "#define SYSCALLTBL_RISCV_MAX_ID $max_nr" > +} > + > +create_table() > +{ > + echo "#include \"$input\"" > + echo "static const char *const syscalltbl_riscv[] = {" > + create_sc_table > + echo "};" > +} > + > +$gcc -E -dM -x c -I $incpath/include/uapi $input \ > + |awk '$2 ~ "__NR" && $3 !~ "__NR3264_" { > + sub("^#define __NR(3264)?_", ""); > + print | "sort -k2 -n"}' \ > + |create_table > diff --git a/tools/perf/util/syscalltbl.c b/tools/perf/util/syscalltbl.c > index 7c15dec6900d..349986f6e5f5 100644 > --- a/tools/perf/util/syscalltbl.c > +++ b/tools/perf/util/syscalltbl.c > @@ -46,6 +46,10 @@ static const char *const *syscalltbl_native = syscalltbl_mips_n64; > #include > const int syscalltbl_native_max_id = SYSCALLTBL_LOONGARCH_MAX_ID; > static const char *const *syscalltbl_native = syscalltbl_loongarch; > +#elif defined(__riscv) > +#include > +const int syscalltbl_native_max_id = SYSCALLTBL_RISCV_MAX_ID; > +static const char *const *syscalltbl_native = syscalltbl_riscv; > #endif > > struct syscall { > > base-commit: c2ee9f594da826bea183ed14f2cc029c719bf4da > -- > 2.45.2 > From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 10DDDD7494F for ; Wed, 30 Oct 2024 00:37:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=6yfvWEV58HytNKW5YoBKRoFa8iqnS9iIe3kuF+chZ/s=; b=e2+59nAVq6BPcl zyTLhYRrjJzM6N7kU285YnVhQlguIgAC6Gm3RqKrZGjcZPeDuBaqgH3DgCQSyQLGJqDRU9W1TTcf2 v00lHIMjjOXrP7CtvoEEUXZA5pBDlO1RnTNp4ZwMMlEFyFP5qGMWjnq4dWbGGJp3zs9TbL4CXtZhX CyWYnoh0Y7uydlPDz8ctercXEnSOHKH4vVupNFzp3mImdJ9SYAO9F8Jm09/ygFJ/Bk7a5Y1BWejaF ftMDFLtZEH2PbxSHXhTDBD+5NgJjGE4gIhTMP88iQDTnCfRw3WYZuClM3AYk2QNK3x06CQz5rzgbc jC4epDB2OpN3eys13yIA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1t5wiH-0000000GLJ3-0zeT; Wed, 30 Oct 2024 00:37:29 +0000 Received: from dfw.source.kernel.org ([139.178.84.217]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1t5wiE-0000000GLIH-0mW8 for linux-riscv@lists.infradead.org; Wed, 30 Oct 2024 00:37:27 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by dfw.source.kernel.org (Postfix) with ESMTP id 134085C2734; Wed, 30 Oct 2024 00:36:40 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 15805C4CECD; Wed, 30 Oct 2024 00:37:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1730248644; bh=dURTOXL4P+eY/enOSnmceDVRo9KrseqCoeA8XcVElsw=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=DRYqBTHJDng3XM4VBRR//2H+o0boZztE1JfVhqL9YY4GKxjDx/nWR6KWvIIUERLeZ sRW6yI7bY8det+O1IYT5KkWYqOwBQLovqgvgcFTIDd3GfbjYwjKldfq9IKnw4psTpC YMMk9wuQQuEhSj8v2ODLbRFCPsE4juPq6vSCk4wdPIlIykUuV6eBpa1caMlYMUXkfC 7g8FV7oWRgekYKhcRW0h4FN7m5nFd+ZXlHhUTdetgBZYtM9SCGd2eGGLteTVwFAd1W q2sXlUERkwzIVZqeL55dyGZDao2P75xQfVw+eVXm1LS6aeWEtRiuR6FNAiSVlN6wPL WGIxx/cxxIYXg== Date: Tue, 29 Oct 2024 17:37:22 -0700 From: Namhyung Kim To: =?utf-8?B?QmrDtnJuIFTDtnBlbA==?= Cc: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Mark Rutland , Alexander Shishkin , Jiri Olsa , Ian Rogers , Adrian Hunter , "Liang, Kan" , linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, linux-riscv@lists.infradead.org, =?utf-8?B?QmrDtnJuIFTDtnBlbA==?= , Paul Walmsley , Palmer Dabbelt , Albert Ou , Anup Patel , Atish Patra Subject: Re: [PATCH] perf, riscv: Wire up perf trace support for RISC-V Message-ID: References: <20241024190353.46737-1-bjorn@kernel.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20241024190353.46737-1-bjorn@kernel.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241029_173726_341875_BFA09B3E X-CRM114-Status: GOOD ( 22.44 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org SGVsbG8sCgpPbiBUaHUsIE9jdCAyNCwgMjAyNCBhdCAxMjowMzo1MVBNIC0wNzAwLCBCasO2cm4g VMO2cGVsIHdyb3RlOgo+IEZyb206IEJqw7ZybiBUw7ZwZWwgPGJqb3JuQHJpdm9zaW5jLmNvbT4K PiAKPiBSSVNDLVYgZG9lcyBub3QgY3VycmVudGx5IHN1cHBvcnQgcGVyZiB0cmFjZSwgc2luY2Ug dGhlIHN5c3RlbSBjYWxsCj4gdGFibGUgaXMgbm90IGdlbmVyYXRlZC4KPiAKPiBQZXJmb3JtIHRo ZSBjb3B5L3Bhc3RlIGV4ZXJjaXNlLCB3aXJpbmcgdXAgUklTQy1WIHN5c3RlbSBjYWxsIHRhYmxl Cj4gZ2VuZXJhdGlvbi4KCkNhbiBhbnlib2R5IHdpdGggUklTQy1WIHBsZWFzZSB0ZXN0IHRoaXM/ CgpUaGFua3MsCk5hbWh5dW5nCgo+IAo+IFNpZ25lZC1vZmYtYnk6IEJqw7ZybiBUw7ZwZWwgPGJq b3JuQHJpdm9zaW5jLmNvbT4KPiAtLS0KPiAgdG9vbHMvcGVyZi9NYWtlZmlsZS5jb25maWcgICAg ICAgICAgICAgICAgICAgIHwgIDYgKystCj4gIHRvb2xzL3BlcmYvYXJjaC9yaXNjdi9NYWtlZmls ZSAgICAgICAgICAgICAgICB8IDIyICsrKysrKysrKwo+ICAuLi4vYXJjaC9yaXNjdi9lbnRyeS9z eXNjYWxscy9ta3N5c2NhbGx0YmwgICAgfCA0NyArKysrKysrKysrKysrKysrKysrCj4gIHRvb2xz L3BlcmYvdXRpbC9zeXNjYWxsdGJsLmMgICAgICAgICAgICAgICAgICB8ICA0ICsrCj4gIDQgZmls ZXMgY2hhbmdlZCwgNzggaW5zZXJ0aW9ucygrKSwgMSBkZWxldGlvbigtKQo+ICBjcmVhdGUgbW9k ZSAxMDA3NTUgdG9vbHMvcGVyZi9hcmNoL3Jpc2N2L2VudHJ5L3N5c2NhbGxzL21rc3lzY2FsbHRi bAo+IAo+IGRpZmYgLS1naXQgYS90b29scy9wZXJmL01ha2VmaWxlLmNvbmZpZyBiL3Rvb2xzL3Bl cmYvTWFrZWZpbGUuY29uZmlnCj4gaW5kZXggNGRkYjI3YTQ4ZWVkLi4xZDM4OGU3MWUwY2MgMTAw NjQ0Cj4gLS0tIGEvdG9vbHMvcGVyZi9NYWtlZmlsZS5jb25maWcKPiArKysgYi90b29scy9wZXJm L01ha2VmaWxlLmNvbmZpZwo+IEBAIC0zMSw3ICszMSw3IEBAICQoY2FsbCBkZXRlY3RlZF92YXIs U1JDQVJDSCkKPiAgaWZuZXEgKCQoTk9fU1lTQ0FMTF9UQUJMRSksMSkKPiAgICBOT19TWVNDQUxM X1RBQkxFIDo9IDEKPiAgCj4gLSAgaWZlcSAoJChTUkNBUkNIKSwkKGZpbHRlciAkKFNSQ0FSQ0gp LHg4NiBwb3dlcnBjIGFybTY0IHMzOTAgbWlwcyBsb29uZ2FyY2gpKQo+ICsgIGlmZXEgKCQoU1JD QVJDSCksJChmaWx0ZXIgJChTUkNBUkNIKSx4ODYgcG93ZXJwYyBhcm02NCBzMzkwIG1pcHMgbG9v bmdhcmNoIHJpc2N2KSkKPiAgICAgIE5PX1NZU0NBTExfVEFCTEUgOj0gMAo+ICAgIGVuZGlmCj4g IAo+IEBAIC04Myw2ICs4MywxMCBAQCBpZmVxICgkKEFSQ0gpLG1pcHMpCj4gICAgTElCVU5XSU5E X0xJQlMgPSAtbHVud2luZCAtbHVud2luZC1taXBzCj4gIGVuZGlmCj4gIAo+ICtpZmVxICgkKEFS Q0gpLHJpc2N2KQo+ICsgIENGTEFHUyArPSAtSSQoT1VUUFVUKWFyY2gvcmlzY3YvaW5jbHVkZS9n ZW5lcmF0ZWQKPiArZW5kaWYKPiArCj4gICMgU28gZmFyIHRoZXJlJ3Mgb25seSB4ODYgYW5kIGFy bSBsaWJkdyB1bndpbmQgc3VwcG9ydCBtZXJnZWQgaW4gcGVyZi4KPiAgIyBEaXNhYmxlIGl0IG9u IGFsbCBvdGhlciBhcmNoaXRlY3R1cmVzIGluIGNhc2UgbGliZHcgdW53aW5kCj4gICMgc3VwcG9y dCBpcyBkZXRlY3RlZCBpbiBzeXN0ZW0uIEFkZCBzdXBwb3J0ZWQgYXJjaGl0ZWN0dXJlcwo+IGRp ZmYgLS1naXQgYS90b29scy9wZXJmL2FyY2gvcmlzY3YvTWFrZWZpbGUgYi90b29scy9wZXJmL2Fy Y2gvcmlzY3YvTWFrZWZpbGUKPiBpbmRleCA5MGMzYzQ3NmEyNDIuLjQ4MWRhNDUxODY5NSAxMDA2 NDQKPiAtLS0gYS90b29scy9wZXJmL2FyY2gvcmlzY3YvTWFrZWZpbGUKPiArKysgYi90b29scy9w ZXJmL2FyY2gvcmlzY3YvTWFrZWZpbGUKPiBAQCAtNCwzICs0LDI1IEBAIGVuZGlmCj4gIFBFUkZf SEFWRV9BUkNIX1JFR1NfUVVFUllfUkVHSVNURVJfT0ZGU0VUIDo9IDEKPiAgUEVSRl9IQVZFX0pJ VERVTVAgOj0gMQo+ICBIQVZFX0tWTV9TVEFUX1NVUFBPUlQgOj0gMQo+ICsKPiArIwo+ICsjIFN5 c2NhbGwgdGFibGUgZ2VuZXJhdGlvbiBmb3IgcGVyZgo+ICsjCj4gKwo+ICtvdXQgICAgOj0gJChP VVRQVVQpYXJjaC9yaXNjdi9pbmNsdWRlL2dlbmVyYXRlZC9hc20KPiAraGVhZGVyIDo9ICQob3V0 KS9zeXNjYWxscy5jCj4gK2luY3BhdGggOj0gJChzcmN0cmVlKS90b29scwo+ICtzeXNkZWYgOj0g JChzcmN0cmVlKS90b29scy9hcmNoL3Jpc2N2L2luY2x1ZGUvdWFwaS9hc20vdW5pc3RkLmgKPiAr c3lzcHJmIDo9ICQoc3JjdHJlZSkvdG9vbHMvcGVyZi9hcmNoL3Jpc2N2L2VudHJ5L3N5c2NhbGxz Lwo+ICtzeXN0YmwgOj0gJChzeXNwcmYpL21rc3lzY2FsbHRibAo+ICsKPiArIyBDcmVhdGUgb3V0 cHV0IGRpcmVjdG9yeSBpZiBub3QgYWxyZWFkeSBwcmVzZW50Cj4gKyQoc2hlbGwgWyAtZCAnJChv dXQpJyBdIHx8IG1rZGlyIC1wICckKG91dCknKQo+ICsKPiArJChoZWFkZXIpOiAkKHN5c2RlZikg JChzeXN0YmwpCj4gKwkkKFEpJChTSEVMTCkgJyQoc3lzdGJsKScgJyQoQ0MpJyAnJChIT1NUQ0Mp JyAkKGluY3BhdGgpICQoc3lzZGVmKSA+ICRACj4gKwo+ICtjbGVhbjo6Cj4gKwkkKGNhbGwgUVVJ RVRfQ0xFQU4sIHJpc2N2KSAkKFJNKSAkKGhlYWRlcikKPiArCj4gK2FyY2hoZWFkZXJzOiAkKGhl YWRlcikKPiBkaWZmIC0tZ2l0IGEvdG9vbHMvcGVyZi9hcmNoL3Jpc2N2L2VudHJ5L3N5c2NhbGxz L21rc3lzY2FsbHRibCBiL3Rvb2xzL3BlcmYvYXJjaC9yaXNjdi9lbnRyeS9zeXNjYWxscy9ta3N5 c2NhbGx0YmwKPiBuZXcgZmlsZSBtb2RlIDEwMDc1NQo+IGluZGV4IDAwMDAwMDAwMDAwMC4uYzU5 ZjVlODUyYjk3Cj4gLS0tIC9kZXYvbnVsbAo+ICsrKyBiL3Rvb2xzL3BlcmYvYXJjaC9yaXNjdi9l bnRyeS9zeXNjYWxscy9ta3N5c2NhbGx0YmwKPiBAQCAtMCwwICsxLDQ3IEBACj4gKyMhL2Jpbi9z aAo+ICsjIFNQRFgtTGljZW5zZS1JZGVudGlmaWVyOiBHUEwtMi4wCj4gKyMKPiArIyBHZW5lcmF0 ZSBzeXN0ZW0gY2FsbCB0YWJsZSBmb3IgcGVyZi4gRGVyaXZlZCBmcm9tCj4gKyMgcG93ZXJwYyBz Y3JpcHQuCj4gKyMKPiArIyBDb3B5cmlnaHQgSUJNIENvcnAuIDIwMTcKPiArIyBBdXRob3Iocyk6 ICBIZW5kcmlrIEJydWVja25lciA8YnJ1ZWNrbmVyQGxpbnV4LnZuZXQuaWJtLmNvbT4KPiArIyBD aGFuZ2VkIGJ5OiBSYXZpIEJhbmdvcmlhIDxyYXZpLmJhbmdvcmlhQGxpbnV4LnZuZXQuaWJtLmNv bT4KPiArIyBDaGFuZ2VkIGJ5OiBLaW0gUGhpbGxpcHMgPGtpbS5waGlsbGlwc0Bhcm0uY29tPgo+ ICsjIENoYW5nZWQgYnk6IEJqw7ZybiBUw7ZwZWwgPGJqb3JuQHJpdm9zaW5jLmNvbT4KPiArCj4g K2djYz0kMQo+ICtob3N0Y2M9JDIKPiAraW5jcGF0aD0kMwo+ICtpbnB1dD0kNAo+ICsKPiAraWYg ISB0ZXN0IC1yICRpbnB1dDsgdGhlbgo+ICsJZWNobyAiQ291bGQgbm90IHJlYWQgaW5wdXQgZmls ZSIgPiYyCj4gKwlleGl0IDEKPiArZmkKPiArCj4gK2NyZWF0ZV9zY190YWJsZSgpCj4gK3sKPiAr CWxvY2FsIHNjIG5yIG1heF9ucgo+ICsKPiArCXdoaWxlIHJlYWQgc2MgbnI7IGRvCj4gKwkJcHJp bnRmICIlc1xuIiAiCVskbnJdID0gXCIkc2NcIiwiCj4gKwkJbWF4X25yPSRucgo+ICsJZG9uZQo+ ICsKPiArCWVjaG8gIiNkZWZpbmUgU1lTQ0FMTFRCTF9SSVNDVl9NQVhfSUQgJG1heF9uciIKPiAr fQo+ICsKPiArY3JlYXRlX3RhYmxlKCkKPiArewo+ICsJZWNobyAiI2luY2x1ZGUgXCIkaW5wdXRc IiIKPiArCWVjaG8gInN0YXRpYyBjb25zdCBjaGFyICpjb25zdCBzeXNjYWxsdGJsX3Jpc2N2W10g PSB7Igo+ICsJY3JlYXRlX3NjX3RhYmxlCj4gKwllY2hvICJ9OyIKPiArfQo+ICsKPiArJGdjYyAt RSAtZE0gLXggYyAtSSAkaW5jcGF0aC9pbmNsdWRlL3VhcGkgJGlucHV0IFwKPiArCXxhd2sgJyQy IH4gIl9fTlIiICYmICQzICF+ICJfX05SMzI2NF8iIHsKPiArCQlzdWIoIl4jZGVmaW5lIF9fTlIo MzI2NCk/XyIsICIiKTsKPiArCQlwcmludCB8ICJzb3J0IC1rMiAtbiJ9JyBcCj4gKwl8Y3JlYXRl X3RhYmxlCj4gZGlmZiAtLWdpdCBhL3Rvb2xzL3BlcmYvdXRpbC9zeXNjYWxsdGJsLmMgYi90b29s cy9wZXJmL3V0aWwvc3lzY2FsbHRibC5jCj4gaW5kZXggN2MxNWRlYzY5MDBkLi4zNDk5ODZmNmU1 ZjUgMTAwNjQ0Cj4gLS0tIGEvdG9vbHMvcGVyZi91dGlsL3N5c2NhbGx0YmwuYwo+ICsrKyBiL3Rv b2xzL3BlcmYvdXRpbC9zeXNjYWxsdGJsLmMKPiBAQCAtNDYsNiArNDYsMTAgQEAgc3RhdGljIGNv bnN0IGNoYXIgKmNvbnN0ICpzeXNjYWxsdGJsX25hdGl2ZSA9IHN5c2NhbGx0YmxfbWlwc19uNjQ7 Cj4gICNpbmNsdWRlIDxhc20vc3lzY2FsbHMuYz4KPiAgY29uc3QgaW50IHN5c2NhbGx0YmxfbmF0 aXZlX21heF9pZCA9IFNZU0NBTExUQkxfTE9PTkdBUkNIX01BWF9JRDsKPiAgc3RhdGljIGNvbnN0 IGNoYXIgKmNvbnN0ICpzeXNjYWxsdGJsX25hdGl2ZSA9IHN5c2NhbGx0YmxfbG9vbmdhcmNoOwo+ ICsjZWxpZiBkZWZpbmVkKF9fcmlzY3YpCj4gKyNpbmNsdWRlIDxhc20vc3lzY2FsbHMuYz4KPiAr Y29uc3QgaW50IHN5c2NhbGx0YmxfbmF0aXZlX21heF9pZCA9IFNZU0NBTExUQkxfUklTQ1ZfTUFY X0lEOwo+ICtzdGF0aWMgY29uc3QgY2hhciAqY29uc3QgKnN5c2NhbGx0YmxfbmF0aXZlID0gc3lz Y2FsbHRibF9yaXNjdjsKPiAgI2VuZGlmCj4gIAo+ICBzdHJ1Y3Qgc3lzY2FsbCB7Cj4gCj4gYmFz ZS1jb21taXQ6IGMyZWU5ZjU5NGRhODI2YmVhMTgzZWQxNGYyY2MwMjljNzE5YmY0ZGEKPiAtLSAK PiAyLjQ1LjIKPiAKCl9fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fCmxpbnV4LXJpc2N2IG1haWxpbmcgbGlzdApsaW51eC1yaXNjdkBsaXN0cy5pbmZyYWRlYWQu b3JnCmh0dHA6Ly9saXN0cy5pbmZyYWRlYWQub3JnL21haWxtYW4vbGlzdGluZm8vbGludXgtcmlz Y3YK