Re: [PATCH 6/6] target/i386: Introduce GraniteRapids-v2 model

[Tao Su <tao1.su@linux.intel.com>]

On Tue, Oct 29, 2024 at 10:58:39PM +0800, Zhao Liu wrote:
> On Mon, Oct 28, 2024 at 10:45:12AM +0800, Tao Su wrote:
> > Date: Mon, 28 Oct 2024 10:45:12 +0800
> > From: Tao Su <tao1.su@linux.intel.com>
> > Subject: [PATCH 6/6] target/i386: Introduce GraniteRapids-v2 model
> > X-Mailer: git-send-email 2.34.1
> > 
> > Update GraniteRapids CPU model to add AVX10 and the missing features(ss,
> > tsc-adjust, cldemote, movdiri, movdir64b).
> 
> Do you have datasheet link? It's better to add the link in the commit
> message for easy comparison checking.
> 

Sorry, I think we can get new CPUIDs in ISE[*], but as far as I know,
there is no datasheet which lists all CPUIDs.

[*] https://cdrdv2.intel.com/v1/dl/getContent/671368

> > Tested-by: Xuelian Guo <xuelian.guo@intel.com>
> > Signed-off-by: Tao Su <tao1.su@linux.intel.com>
> > ---
> >  target/i386/cpu.c | 17 +++++++++++++++++
> >  1 file changed, 17 insertions(+)
> > 
> > diff --git a/target/i386/cpu.c b/target/i386/cpu.c
> > index adde98fd26..8d72c08b66 100644
> > --- a/target/i386/cpu.c
> > +++ b/target/i386/cpu.c
> > @@ -4375,6 +4375,23 @@ static const X86CPUDefinition builtin_x86_defs[] = {
> >          .model_id = "Intel Xeon Processor (GraniteRapids)",
> >          .versions = (X86CPUVersionDefinition[]) {
> >              { .version = 1 },
> > +            {
> > +                .version = 2,
> > +                .props = (PropValue[]) {
> > +                    { "ss", "on" },
> > +                    { "tsc-adjust", "on" },
> > +                    { "cldemote", "on" },
> > +                    { "movdiri", "on" },
> > +                    { "movdir64b", "on" },
> > +                    { "avx10", "on" },
> > +                    { "avx10-128", "on" },
> > +                    { "avx10-256", "on" },
> > +                    { "avx10-512", "on" },
> > +                    { "avx10-version", "1" },
> > +                    { "stepping", "1" },
> > +                    { /* end of list */ }
> > +                }
> > +            },
> >              { /* end of list */ },
> >          },
> >      },
> > -- 
> > 2.34.1
> > 
> 
> LGTM,
> 
> Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
> 
> BTW, Could you please update the CPU model you added in
> docs/system/cpu-models-x86.rst.inc (section "Preferred CPU models for
> Intel x86 hosts") as well? Although this document has been inactive for
> some time, it hasn't been deprecated, and we can pick it up again to
> continue updating it, helping QEMU users understand QEMU's support for
> x86 CPU/features.

Yes, thanks for this suggestion! I think I can update the doc when I
introduce new CPU models (e.g. upcoming Clearwater Forest).