All of lore.kernel.org
 help / color / mirror / Atom feed
From: Raag Jadav <raag.jadav@intel.com>
To: Jani Nikula <jani.nikula@linux.intel.com>
Cc: joonas.lahtinen@linux.intel.com, rodrigo.vivi@intel.com,
	matthew.d.roper@intel.com, andi.shyti@linux.intel.com,
	intel-gfx@lists.freedesktop.org, anshuman.gupta@intel.com,
	badal.nilawar@intel.com, riana.tauro@intel.com
Subject: Re: [PATCH v3 0/4] Implement Wa_14022698537
Date: Thu, 31 Oct 2024 10:59:01 +0200	[thread overview]
Message-ID: <ZyNG1XzXPg7hW72l@black.fi.intel.com> (raw)
In-Reply-To: <874j4tl9hp.fsf@intel.com>

On Wed, Oct 30, 2024 at 08:40:50PM +0200, Jani Nikula wrote:
> On Wed, 30 Oct 2024, Raag Jadav <raag.jadav@intel.com> wrote:
> > This series implements Wa_14022698537 for DG2 along with its prerequisites
> > in i915. Now that we have a common pciids.h in place, this can be extended
> > to xe as well. Detailed description in commit message.
> 
> Okay, so this bumps the requirements during development, but where's the
> implementation for xe? What's it going to look like?

The requirement is only for i915. What I mean here is, if the requirement
arises for xe in the future, this *can* be implemented without significant
refactoring now that we have a common pciids.h in place.

I know it's not the best choice of words but I thought you wouldn't mind :)

Raag

  reply	other threads:[~2024-10-31  8:59 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-10-30 14:34 [PATCH v3 0/4] Implement Wa_14022698537 Raag Jadav
2024-10-30 14:34 ` [PATCH v3 1/4] drm/intel/pciids: Refactor DG2 PCI IDs into segment ranges Raag Jadav
2024-11-20  7:21   ` Riana Tauro
2024-12-10 11:45   ` Andi Shyti
2024-10-30 14:34 ` [PATCH v3 2/4] drm/i915/dg2: Introduce DG2_D subplatform Raag Jadav
2024-10-30 14:34 ` [PATCH v3 3/4] drm/i915: Introduce intel_cpu_info.c for CPU IDs Raag Jadav
2024-12-10  7:38   ` Riana Tauro
2024-12-10 12:03   ` Andi Shyti
2024-10-30 14:34 ` [PATCH v3 4/4] drm/i915/dg2: Implement Wa_14022698537 Raag Jadav
2024-10-30 15:34   ` Andi Shyti
2024-10-30 16:35     ` Raag Jadav
2024-10-30 18:39   ` Jani Nikula
2024-10-31  8:51     ` Raag Jadav
2024-10-31  9:27       ` Jani Nikula
2024-10-31 11:02         ` Raag Jadav
2024-12-10  8:03   ` Riana Tauro
2024-12-10 11:33     ` Raag Jadav
2024-12-10 12:52   ` Andi Shyti
2024-12-11  5:21     ` Raag Jadav
2024-12-11  9:04       ` Andi Shyti
2024-10-30 15:03 ` ✗ Fi.CI.CHECKPATCH: warning for Implement Wa_14022698537 (rev2) Patchwork
2024-10-30 15:03 ` ✗ Fi.CI.SPARSE: " Patchwork
2024-10-30 16:20 ` ✓ Fi.CI.BAT: success " Patchwork
2024-10-30 18:40 ` [PATCH v3 0/4] Implement Wa_14022698537 Jani Nikula
2024-10-31  8:59   ` Raag Jadav [this message]
2024-11-04 16:08 ` Jani Nikula

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=ZyNG1XzXPg7hW72l@black.fi.intel.com \
    --to=raag.jadav@intel.com \
    --cc=andi.shyti@linux.intel.com \
    --cc=anshuman.gupta@intel.com \
    --cc=badal.nilawar@intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=jani.nikula@linux.intel.com \
    --cc=joonas.lahtinen@linux.intel.com \
    --cc=matthew.d.roper@intel.com \
    --cc=riana.tauro@intel.com \
    --cc=rodrigo.vivi@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.