Re: [PATCH next v2 4/4] rockchip: rk3399: move sysreset-gpio logic to TPL

[Paul Kocialkowski <paulk@sys-base.io>]

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Hi,

Le Thu 07 Nov 24, 12:04, Quentin Schulz a écrit :
> On 11/7/24 8:14 AM, Kever Yang wrote:
> > Yes, this movement is reasonable and needed for this workaround,
> > although still not
> > 
> > understand why puma board need this.
> 
> Me neither, this predates me joining the company, c.f.:
> https://source.denx.de/u-boot/u-boot/-/commit/ae0d33a7291a164a11ae034bcf4f71226b2bef48
> https://source.denx.de/u-boot/u-boot/-/commit/5f104178bf713615dc404fdfcf0fb53d89c66a07
> https://source.denx.de/u-boot/u-boot/-/commit/07586ee4322abca01db52624b925e5218538f259
> 
> What I can tell you is that it seems this is required as Paul (in Cc) is
> trying to add support for it for the Firefly ROC-RK3399-PC[1] and the
> ROCKPro64[2], so it seems it's useful for **some** purpose.

The initial issue I was seeing was that one of the MMC controllers showed some
errors and failed to read data after reboot, while it always worked on cold
boot. With this feature enabled, it worked reliably after reboot.

I didn't investigate exactly which component (maybe clocks, maybe regulators)
caused the problem, but it clearly wasn't correctly reset.

Cheers,

Paul

> [1]
> https://lore.kernel.org/u-boot/20240926183111.1324284-1-paulk@sys-base.io/
> [2]
> https://lore.kernel.org/u-boot/20240926183111.1324284-2-paulk@sys-base.io/
> 
> > > - faster boot time as we don't need to reach SPL to be able to reset the
> > >    system on a condition we know is already met in TPL,
> > > - have less code to be impacted by the issue this system reset works
> > >    around (that is, "unclean" SoC registers after a reboot),
> > > - less confusion around the reason for restarting. Indeed when done from
> > >    SPL, the following log can be observed:
> > > 
> > > """
> > > U-Boot TPL 2025.01-rc1-00165-gd79216ca9878-dirty (Nov 05 2024 - 15:31:45)
> > > Channel 0: DDR3, 666MHz
> > > BW=32 Col=10 Bk=8 CS0 Row=16 CS=1 Die BW=16 Size=2048MB
> > > Channel 1: DDR3, 666MHz
> > > BW=32 Col=10 Bk=8 CS0 Row=16 CS=1 Die BW=16 Size=2048MB
> > > 256B stride
> > > Trying to boot from BOOTROM
> > > Returning to boot ROM...
> > > 
> > > U-Boot SPL 2025.01-rc1-00165-gd79216ca9878-dirty (Nov 05 2024 -
> > > 15:31:45 +0100)
> > > Trying to boot from MMC2
> > > 
> > > U-Boot TPL 2025.01-rc1-00165-gd79216ca9878-dirty (Nov 05 2024 - 15:31:45)
> > > """
> > So with this patch set, we can see the TPL banner twice ?
> > 
> > 
> > PS: We are able to merge to master instead of next before next branch is
> > open, because we still have
> > 
> > enough time to debug before next release.
> > 
> 
> My understanding is that once -rc1 is out, we should only do bug fixing in
> master. BUT at the same time, next branch isn't actually open until -rc2.
> 
> Up to you! It's not really urgent, Puma was migrated to TPL only in v2023.01
> and we've lived without sysreset-gpio in TPL since then :)
> 
> Cheers,
> Quentin

-- 
Paul Kocialkowski,

Independent contractor - sys-base - https://www.sys-base.io/
Free software developer - https://www.paulk.fr/

Specialist in multimedia, graphics and embedded hardware support with Linux.

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