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Thu, 21 Nov 2024 01:52:03 -0800 (PST) Date: Thu, 21 Nov 2024 10:52:02 +0100 From: Roger Pau =?utf-8?B?TW9ubsOp?= To: "Chen, Jiqian" Cc: "xen-devel@lists.xenproject.org" , Andrew Cooper , Jan Beulich , Julien Grall , Stefano Stabellini Subject: Re: [PATCH] vpci: Add resizable bar support Message-ID: References: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: On Thu, Nov 21, 2024 at 03:05:14AM +0000, Chen, Jiqian wrote: > On 2024/11/20 17:01, Roger Pau Monné wrote: > > On Wed, Nov 20, 2024 at 03:01:57AM +0000, Chen, Jiqian wrote: > >> The only difference between our methods is the timing of updating the size. > >> Yours is later than mine because you updated the size when the driver re-enabled memory decoding, while I updated the size in time when driver resize it. > > > > Indeed, my last guess is the stale cached size is somehow used in my > > approach, and that leads to the failures. One last (possibly dummy?) > > thing to try might be to use your patch to detect writes to the resize > > control register, but update the BAR sizes in modify_bars(), while > > keeping the traces of when the operations happen. > > > This can work, combine our method, use my patch to detect and write the size into hardware register, and use your patch to update bar[i].size in modify_bars(). > Attached the combined patch and the xl dmesg. This is even weirder, so the attached patch works fine? The only difference with my proposal is that you trap the CTRL registers, but the sizing is still done in modify_bars(). What happens if (based on the attached patch) you change rebar_ctrl_write() to: static void cf_check rebar_ctrl_write(const struct pci_dev *pdev, unsigned int reg, uint32_t val, void *data) { pci_conf_write32(pdev->sbdf, reg, val); } And if you don't trap any PCI_REBAR_CTRL at all? I'm mostly interested in figuring put which part of the code in rebar.c makes this work (as compared to my original approach). Thanks, Roger.