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From: Leo Liang <ycliang@andestech.com>
To: Thomas Bonnefille <thomas.bonnefille@bootlin.com>
Cc: "Peng Fan" <peng.fan@nxp.com>,
	"Jaehoon Chung" <jh80.chung@samsung.com>,
	"Tom Rini" <trini@konsulko.com>, "Rick Chen" <rick@andestech.com>,
	"Kongyang Liu" <seashell11234455@gmail.com>,
	"Thomas Petazzoni" <thomas.petazzoni@bootlin.com>,
	"Miquèl Raynal" <miquel.raynal@bootlin.com>,
	u-boot@lists.denx.de
Subject: Re: [PATCH 1/3] doc: add LicheeRV Nano and SG2002 SoC
Date: Mon, 18 Nov 2024 17:49:37 +0800	[thread overview]
Message-ID: <ZzsNsXI3qP1wSa_a@swlinux02> (raw)
In-Reply-To: <20241112-licheerv-nano-v1-1-bf75d1eb560e@bootlin.com>

Hi,

On Tue, Nov 12, 2024 at 03:57:36PM +0100, Thomas Bonnefille wrote:
> [EXTERNAL MAIL]
> 
> Provide a page describing the usage of U-Boot on the LicheeRV Nano and a
> description of the board.
> 
> Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com>
> ---
>  doc/board/sophgo/licheerv_nano.rst | 72 ++++++++++++++++++++++++++++++++++++++
>  1 file changed, 72 insertions(+)
> 
> diff --git a/doc/board/sophgo/licheerv_nano.rst b/doc/board/sophgo/licheerv_nano.rst
> new file mode 100644
> index 0000000000000000000000000000000000000000..70401e295c4a56845353c3a92ab4ec98678a1180
> --- /dev/null
> +++ b/doc/board/sophgo/licheerv_nano.rst
> @@ -0,0 +1,72 @@
> +.. SPDX-License-Identifier: GPL-2.0+
> +
> +LicheeRV Nano
> +==========

The title underline is too short and will fail `make htmldocs`.

> +
> +SG2002 RISC-V SoC
> +------------------
> +The SG2002 is a high-performance, low-power 64-bit RISC-V/ARM SoC from Sophgo.
> +
> +Mainline support
> +----------------
> +The support for following drivers are already enabled:
> +1. ns16550 UART Driver.
> +2. Synopsys Designware MSHC Driver
> +
> +Building
> +~~~~~~~~
> +1. Add the RISC-V toolchain to your PATH.
> +2. Setup ARCH & cross compilation environment variable:
> +
> +.. code-block:: console
> +
> +   export CROSS_COMPILE=<riscv64 toolchain prefix>
> +   cd <U-Boot-dir>
> +   make licheerv_nano_defconfig

The name of the defconfig does not seem to match what you provide in [patch 3/3] ?

> +   make
> +
> +This will generate u-boot.bin
> +
> +Booting
> +~~~~~~~
> +Currently, we rely on vendor FSBL (First Stage Boot Loader) to initialize the
> +clock and load the u-boot image, then bootup from it.
> +
> +To run u-boot.bin on top of FSBL, follow these steps:
> +
> +1. Use mainline OpenSBI with a newer version than 1.5 to generate fw_dynamic.
> +
> +2. Generate a compatible u-boot.bin using U-Boot with the LicheeRV Nano default
> +   configuration.
> +
> +3. Use the vendor-provided tool [1] to create a unified fip.bin file containing
> +   FSBL, OpenSBI, and U-Boot.
> +   Note that you will have to use the file cv181x.bin as the FSBL.
> +
> +2. Place the generated fip.bin file into the FAT partition of the SD card.
> +
> +3. Insert the SD card into the board and power it on.
> +
> +The board will automatically execute the FSBL from the fip.bin file.
> +Subsequently, it will transition to OpenSBI, and finally, OpenSBI will invoke
> +U-Boot.
> +
> +[1]: https://github.com/sophgo/fiptool
> +
> +
> +Sample boot log from LicheeRV Nano board
> +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
> +.. code-block:: none
> +
> +   U-Boot 2024.10 (Oct 24 2024 - 15:00:20 +0200)licheerv_nano
> +
> +   DRAM:  256 MiB
> +   Core:  19 devices, 11 uclasses, devicetree: separate
> +   MMC:   mmc@4310000: 0
> +   Loading Environment from nowhere... OK
> +   In:    serial@4140000
> +   Out:   serial@4140000
> +   Err:   serial@4140000
> +   Net:   No ethernet found.
> +   Hit any key to stop autoboot:  0
> +   licheerv_nano#
> 
> --
> 2.47.0

Other than that,
LGTM.

Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>

  reply	other threads:[~2024-11-18  9:50 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-11-12 14:57 [PATCH 0/3] Add support for LicheeRV Nano Thomas Bonnefille
2024-11-12 14:57 ` [PATCH 1/3] doc: add LicheeRV Nano and SG2002 SoC Thomas Bonnefille
2024-11-18  9:49   ` Leo Liang [this message]
2024-11-12 14:57 ` [PATCH 2/3] riscv: dts: sophgo: add device tree for LicheeRV Nano Thomas Bonnefille
2024-11-18 10:01   ` Leo Liang
2024-11-19 20:35     ` Thomas Bonnefille
2024-11-25  9:59       ` Leo Liang
2024-11-27  9:05         ` Thomas Bonnefille
2024-11-12 14:57 ` [PATCH 3/3] board: add support " Thomas Bonnefille

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