From: "Roger Pau Monné" <roger.pau@citrix.com>
To: Frediano Ziglio <frediano.ziglio@cloud.com>
Cc: xen-devel@lists.xenproject.org, Jan Beulich <jbeulich@suse.com>,
Andrew Cooper <andrew.cooper3@citrix.com>
Subject: Re: [PATCH 1/4] x8&/mm: fix IS_LnE_ALIGNED() to comply with Misra Rule 20.7
Date: Tue, 19 Nov 2024 15:10:58 +0100 [thread overview]
Message-ID: <ZzyccgtimsbbFMHH@macbook> (raw)
In-Reply-To: <CACHz=Zg20Sxw_HY6EwXYvhcm=3ZjPwUH7vbdsZtSCU+2_TU7Kw@mail.gmail.com>
On Tue, Nov 19, 2024 at 10:52:26AM +0000, Frediano Ziglio wrote:
> On Tue, Nov 19, 2024 at 10:35 AM Roger Pau Monne <roger.pau@citrix.com> wrote:
> >
> > While not strictly needed to guarantee operator precedence is as expected, add
> > the parentheses to comply with Misra Rule 20.7.
> >
> > No functional change intended.
> >
> > Reported-by: Andrew Cooper <andrew.cooper3@citrix.com>
> > Fixes: 5b52e1b0436f ('x86/mm: skip super-page alignment checks for non-present entries')
> > Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
> > ---
> > xen/arch/x86/mm.c | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
> > index 494c14e80ff9..fa21903eb25a 100644
> > --- a/xen/arch/x86/mm.c
> > +++ b/xen/arch/x86/mm.c
> > @@ -5498,7 +5498,7 @@ int map_pages_to_xen(
> > * be INVALID_MFN, since alignment is only relevant for present entries.
> > */
> > #define IS_LnE_ALIGNED(v, m, n) ({ \
> > - mfn_t m_ = m; \
> > + mfn_t m_ = (m); \
> > \
> > ASSERT(!mfn_eq(m_, INVALID_MFN)); \
> > IS_ALIGNED(PFN_DOWN(v) | mfn_x(m_), \
>
> Minor, typo in subject: x8& -> x86
Nice, that's what you get when you press shift + 6 on a Spanish
keyboard. Hope it can be adjusted at commit.
Thanks.
next prev parent reply other threads:[~2024-11-19 14:11 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-11-19 10:34 [PATCH 0/4] x86/misra: fix remaining violations of rule 20.7 Roger Pau Monne
2024-11-19 10:34 ` [PATCH 1/4] x8&/mm: fix IS_LnE_ALIGNED() to comply with Misra Rule 20.7 Roger Pau Monne
2024-11-19 10:52 ` Frediano Ziglio
2024-11-19 14:10 ` Roger Pau Monné [this message]
2024-11-19 11:06 ` Jan Beulich
2024-11-19 10:34 ` [PATCH 2/4] x86/msi: fix Misra Rule 20.7 in msi.h Roger Pau Monne
2024-11-19 14:21 ` Andrew Cooper
2024-11-19 14:39 ` Roger Pau Monné
2024-11-19 15:35 ` Andrew Cooper
2024-11-19 16:37 ` Roger Pau Monné
2024-11-19 10:34 ` [PATCH 3/4] x86/uaccess: rework user access speculative harden guards Roger Pau Monne
2024-11-19 14:29 ` Jan Beulich
2024-11-19 14:42 ` Roger Pau Monné
2024-11-19 15:31 ` Andrew Cooper
2024-11-19 16:35 ` Roger Pau Monné
2024-11-25 15:54 ` Jan Beulich
2024-11-19 10:34 ` [PATCH 4/4] automation/eclair: make Misra rule 20.7 blocking for x86 also Roger Pau Monne
2024-11-19 15:32 ` Andrew Cooper
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