From: Andrew Jeffery <andrew@codeconstruct.com.au>
To: Marc Olberding <molberding@nvidia.com>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>, Joel Stanley <joel@jms.id.au>
Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3 2/2] dts: aspeed: Add a dts for the nvidia msx4 hpm
Date: Fri, 14 Nov 2025 14:46:19 +1030 [thread overview]
Message-ID: <a030d7a2e2d36064bd86fe2af1ec6e4baabd9946.camel@codeconstruct.com.au> (raw)
In-Reply-To: <20251108-msx1_devicetree-v3-2-c7cb477ade27@nvidia.com>
On Sat, 2025-11-08 at 14:24 -0800, Marc Olberding wrote:
> Adds a dts for the nvidia mgx pcie switchboard reference
> platformi hpm. This is a dual socket granite rapids based platform.
>
> Signed-off-by: Marc Olberding <molberding@nvidia.com>
> ---
> arch/arm/boot/dts/aspeed/Makefile | 1 +
> .../boot/dts/aspeed/aspeed-bmc-nvidia-msx4-bmc.dts | 235 +++++++++++++++++++++
> 2 files changed, 236 insertions(+)
>
> diff --git a/arch/arm/boot/dts/aspeed/Makefile b/arch/arm/boot/dts/aspeed/Makefile
> index 0f0b5b7076545e6babb2f25f302b5d70b71d8a19..c3ce0d218b53f2b4c37061cace483f5f2c6d3bf1 100644
> --- a/arch/arm/boot/dts/aspeed/Makefile
> +++ b/arch/arm/boot/dts/aspeed/Makefile
> @@ -56,6 +56,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
> aspeed-bmc-lenovo-hr855xg2.dtb \
> aspeed-bmc-microsoft-olympus.dtb \
> aspeed-bmc-nvidia-gb200nvl-bmc.dtb \
> + aspeed-bmc-nvidia-msx4-bmc.dtb \
> aspeed-bmc-opp-lanyang.dtb \
> aspeed-bmc-opp-mowgli.dtb \
> aspeed-bmc-opp-nicole.dtb \
> diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-nvidia-msx4-bmc.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-nvidia-msx4-bmc.dts
> new file mode 100644
> index 0000000000000000000000000000000000000000..ad476a093293f807c04f7e70858af1f557c17370
> --- /dev/null
> +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-nvidia-msx4-bmc.dts
> @@ -0,0 +1,235 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/dts-v1/;
> +
> +#include "aspeed-g6.dtsi"
> +#include <dt-bindings/gpio/aspeed-gpio.h>
> +#include <dt-bindings/i2c/i2c.h>
> +
> +/ {
> + model = "AST2600 MSX4 Kernel";
I find this to be a curious model name :)
Are there no other reasonable names?
> + compatible = "nvidia,msx4-bmc", "aspeed,ast2600";
> +
> + aliases {
> + serial0 = &uart1;
> + serial1 = &uart2;
> + serial2 = &uart3;
> + serial3 = &uart4;
> + serial4 = &uart5;
Just checking whether you're actually using all of these? I guess the
uart nodes further down suggest so?
> + };
> +
> + chosen {
> + stdout-path = "uart5:115200n8";
> + };
> +
> + memory@80000000 {
> + device_type = "memory";
> + reg = <0x80000000 0x80000000>;
> + };
> +
> + reserved-memory {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges;
> +
> + gfx_memory: framebuffer {
> + compatible = "shared-dma-pool";
> + size = <0x01000000>;
> + alignment = <0x01000000>;
> + reusable;
> + };
> +
> + video_engine_memory: jpegbuffer {
> + compatible = "shared-dma-pool";
> + size = <0x02000000>; /* 32M */
> + alignment = <0x01000000>;
> + reusable;
> + };
> + };
> +};
> +
> +&ehci1 {
> + status = "okay";
> +};
> +
> +&fmc {
> + status = "okay";
> +
> + flash@0 {
> + compatible = "jedec,spi-nor";
> + label = "bmc";
> + spi-tx-bus-width = <4>;
> + spi-rx-bus-width = <4>;
> + status = "okay";
> + #include "openbmc-flash-layout-128.dtsi"
> + };
> +};
> +
> +&gfx {
> + memory-region = <&gfx_memory>;
> + status = "okay";
> +};
> +
> +&gpio0 {
> + gpio-line-names =
> + /*A0-A7*/ "","","","","","","","",
> + /*B0-B7*/ "ASSERT_BMC_READY","","","","","","","",
> + /*C0-C7*/ "MON_PWR_GOOD","","","","","","","FP_ID_LED_N",
> + /*D0-D7*/ "","","","","","","","",
> + /*E0-E7*/ "","","","","","","","",
> + /*F0-F7*/ "","","","","","","","",
> + /*G0-G7*/ "","","FP_LED_STATUS_GREEN_N","FP_LED_STATUS_AMBER_N",
> + "","","","",
> + /*H0-H7*/ "","","","","","","","",
> + /*I0-I7*/ "","","","","","","","",
> + /*J0-J7*/ "","","","","","","","",
> + /*K0-K7*/ "","","","","","","","",
> + /*L0-L7*/ "","","","","","","","",
> + /*M0-M7*/ "","","","","","","","",
> + /*N0-N7*/ "","","","","","","","",
> + /*O0-O7*/ "","","","","","","","",
> + /*P0-P7*/ "MON_PWR_BTN_L","ASSERT_PWR_BTN_L","MON_RST_BTN_L",
> + "ASSERT_RST_BTN_L","","ASSERT_NMI_BTN_L","","",
> + /*Q0-Q7*/ "","","MEMORY_HOT_0","MEMORY_HOT_1","","","","",
> + /*R0-R7*/ "ID_BTN","","","","","VBAT_GPIO","","",
> + /*S0-S7*/ "","","RST_PCA_MUX","","","","","",
> + /*T0-T7*/ "","","","","","","","",
> + /*U0-U7*/ "","","","","","","","",
> + /*V0-V7*/ "","","","","","","","",
> + /*W0-W7*/ "","","","","","","","",
> + /*X0-X7*/ "","","","","","","","",
> + /*Y0-Y7*/ "","","","","","","","",
> + /*Z0-Z7*/ "","","","","","","","";
> +};
> +
> +&gpio1 {
> + gpio-line-names =
> + /*18A0-18A7*/ "","","","","","","","",
> + /*18B0-18B7*/ "","","","","","","","",
> + /*18C0-18C7*/ "","","","","","","","",
> + /*18D0-18D7*/ "","","","","","","","",
> + /*18E0-18E3*/ "","","BMC_INIT_DONE","";
> +};
> +
> +&i2c0 {
> + status = "okay";
> +};
> +
> +&i2c1 {
> + status = "okay";
> +};
> +
> +&i2c2 {
> + status = "okay";
> +};
> +
> +&i2c3 {
> + status = "okay";
> +};
> +
> +&i2c4 {
> + status = "okay";
> +
> + eeprom@51 {
> + compatible = "atmel,24c256";
> + reg = <0x51>;
> + pagesize = <64>;
> + label = "sku";
> + };
> +};
> +
> +&i2c5 {
> + status = "okay";
> +};
> +
> +&i2c6 {
> + status = "okay";
> +};
> +
> +&i2c7 {
> + status = "okay";
> +};
> +
> +&i2c8 {
> + status = "okay";
> +};
> +
> +&i2c9 {
> + status = "okay";
> +};
> +
> +&i2c10 {
> + status = "okay";
> +};
> +
> +&i2c11 {
> + status = "okay";
> +};
> +
> +&i2c12 {
> + status = "okay";
> +};
> +
> +&i2c13 {
> + status = "okay";
> +};
> +
> +&i2c15 {
> + status = "okay";
> +};
> +
Seems curious to enable all of these I2C controllers yet have no
devices under them? Can you elaborate?
Andrew
> +&kcs1 {
> + aspeed,lpc-io-reg = <0xca0>;
> + status = "okay";
> +};
> +
> +&kcs2 {
> + aspeed,lpc-io-reg = <0xca8>;
> + status = "okay";
> +};
> +
> +&kcs3 {
> + aspeed,lpc-io-reg = <0xca2>;
> + status = "okay";
> +};
> +
> +&lpc_reset {
> + status = "okay";
> +};
> +
> +&rtc {
> + status = "okay";
> +};
> +
> +&sgpiom0 {
> + ngpios = <80>;
> + status = "okay";
> +};
> +
> +&uart_routing {
> + status = "okay";
> +};
> +
> +&uart1 {
> + status = "okay";
> +};
> +
> +&uart2 {
> + status = "okay";
> +};
> +
> +&uart3 {
> + status = "okay";
> +};
> +
> +&uart4 {
> + status = "okay";
> +};
> +
> +&uart5 {
> + status = "okay";
> +};
> +
> +&video {
> + memory-region = <&video_engine_memory>;
> + status = "okay";
> +};
next prev parent reply other threads:[~2025-11-14 4:16 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-08 22:24 [PATCH v3 0/2] Add device tree for Nvidia BMC msx4 cx8 switchboard Marc Olberding
2025-11-08 22:24 ` [PATCH v3 1/2] dt-bindings: arm: aspeed: Add Nvidia msx4 board Marc Olberding
2025-11-08 22:24 ` [PATCH v3 2/2] dts: aspeed: Add a dts for the nvidia msx4 hpm Marc Olberding
2025-11-14 4:16 ` Andrew Jeffery [this message]
2025-11-14 6:26 ` Marc Olberding
2025-11-24 4:36 ` Andrew Jeffery
2025-11-10 14:34 ` [PATCH v3 0/2] Add device tree for Nvidia BMC msx4 cx8 switchboard Rob Herring (Arm)
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