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Tue, 10 Dec 2024 01:54:44 -0800 (PST) Message-ID: Date: Tue, 10 Dec 2024 10:54:43 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 1/1] vpci: Add resizable bar support To: "Chen, Jiqian" Cc: Andrew Cooper , Julien Grall , Stefano Stabellini , "Huang, Ray" , "xen-devel@lists.xenproject.org" , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: <20241202060956.1124162-1-Jiqian.Chen@amd.com> <4e4df0ee-67f6-41e3-bfc7-e78011680015@suse.com> <1e0576d9-400e-4483-8dd1-061e215a00cd@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 10.12.2024 08:57, Chen, Jiqian wrote: > On 2024/12/10 15:17, Jan Beulich wrote: >> On 10.12.2024 08:07, Chen, Jiqian wrote: >>> On 2024/12/9 21:59, Jan Beulich wrote: >>>> On 02.12.2024 07:09, Jiqian Chen wrote: >>>>> +static void cf_check rebar_ctrl_write(const struct pci_dev *pdev, >>>>> + unsigned int reg, >>>>> + uint32_t val, >>>>> + void *data) >>>>> +{ >>>>> + uint64_t size; >>>>> + unsigned int index; >>>>> + struct vpci_bar *bars = data; >>>>> + >>>>> + if ( pci_conf_read16(pdev->sbdf, PCI_COMMAND) & PCI_COMMAND_MEMORY ) >>>>> + return; >>>> >>>> I don't think something like this can go uncommented. I don't think the >>>> spec mandates to drop writes in this situation? >>> Spec says: Software must clear the Memory Space Enable bit in the Command register before writing the BAR Size field. >>> This check is suggested by Roger and it really helps to prevent erroneous writes in this case, >>> such as the result of debugging with Roger in the previous version. >>> I will add the spec's sentences as comments here in next version. >> >> What you quote from the spec may not be enough as a comment here. There's >> no direct implication that the write would simply be dropped on the floor >> if the bit is still set. So I think you want to go a little beyond just >> quoting from the spec. > How about quoting Roger's previous words: " The memory decoding must be disabled before writing the BAR size field. > Otherwise changing the BAR size will lead to the active p2m mappings getting out of sync w.r.t. the new BAR size." ? That'll be better, but imo still not enough to explain the outright ignoring of the write. >>>>> + if ( rc ) >>>>> + { >>>>> + printk("%pp: add register for PCI_REBAR_CAP failed (rc=%d)\n", >>>>> + &pdev->sbdf, rc); >>>>> + break; >>>>> + } >>>>> + >>>>> + rc = vpci_add_register(pdev->vpci, vpci_hw_read32, rebar_ctrl_write, >>>>> + rebar_offset + PCI_REBAR_CTRL, 4, >>>>> + pdev->vpci->header.bars); >>>>> + if ( rc ) >>>>> + { >>>>> + printk("%pp: add register for PCI_REBAR_CTRL failed %d\n", >>>>> + &pdev->sbdf, rc); >>>>> + break; >>>> >>>> Is it correct to keep the other handler installed? After all ... >>> Will change to "return rc;" here and above in next version. >> >> I'm not convinced this is what we want, as per ... >> >>>>> + } >>>>> + } >>>>> + >>>>> + return 0; >>>> >>>> ... you - imo sensibly - aren't communicating the error back up (to allow >>>> the device to be used without BAR resizing. >> >> ... what I said here. > Sorry, I didn’t understand. > Do you mean it is not enough to return error code once a handler failed to be installed, I need to remove the already installed handlers? No, if you return an error here, nothing else needs doing. However, I question that returning an error here is good or even necessary. In the event of an error, the device ought to still be usable, just without the BAR-resizing capability. >>>>> @@ -541,6 +542,16 @@ >>>>> #define PCI_VNDR_HEADER_REV(x) (((x) >> 16) & 0xf) >>>>> #define PCI_VNDR_HEADER_LEN(x) (((x) >> 20) & 0xfff) >>>>> >>>>> +/* Resizable BARs */ >>>>> +#define PCI_REBAR_CAP 4 /* capability register */ >>>>> +#define PCI_REBAR_CAP_SIZES 0xFFFFFFF0 /* supported BAR sizes */ >>>> >>>> Misra demands that this have a U suffix. >>> Do below PCI_REBAR_CTRL_BAR_IDX, PCI_REBAR_CTRL_NBAR_MASK and PCI_REBAR_CTRL_BAR_SIZE also need a U suffix? >> >> They may want to gain them for consistency, but they don't strictly need >> them. I wanted to say "See the rest of the file", but it looks like the >> file wasn't cleaned up yet Misra-wise. > Yes, I noticed that the rest of the file didn't add U suffix too. > So, I just need to add U suffixes for my new macros? You only strictly need to add U to values with the top bit set. >>>>> +#define PCI_REBAR_CTRL 8 /* control register */ >>>>> +#define PCI_REBAR_CTRL_BAR_IDX 0x00000007 /* BAR index */ >>>>> +#define PCI_REBAR_CTRL_NBAR_MASK 0x000000E0 /* # of resizable BARs */ >>>>> +#define PCI_REBAR_CTRL_BAR_SIZE 0x00001F00 /* BAR size */ >>>>> +#define PCI_REBAR_CTRL_SIZE(v) \ >>>>> + (1UL << (MASK_EXTR(v, PCI_REBAR_CTRL_BAR_SIZE) + 20)) >>>> >>>> The literal 20 (appearing here the 2nd time) also wants hiding behind a >>>> #define. >>> OK, will add " #define PCI_REBAR_SIZE_UNIT_BYTES_LEN 20" to replace above two '20' case. >> >> What is "UNIT_BYTES_LEN" there? There's nothing byte-ish here, I don't >> think, 20 is simply the shift bias. > It's a naming problem. What I want to express here is that the basic unit is 1MB, which is 2^20 of bytes. > Since the spec has the definition about the value of the bar size bits of register: > BAR Size - This is an encoded value. > 0 1 MB (2^20 bytes) > 1 2 MB (2^21 bytes) > 2 4 MB (2^22 bytes) > 3 8 MB (2^23 bytes) > … > 43 8 EB (2^63 bytes) > Do you have suggestion about this macro name? PCI_REBAR_SIZE_BIAS? PCI_REBAR_SIZE_SHIFT_BIAS? PCI_REBAR_SIZE_SHIFT? Jan