From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.6 required=3.0 tests=DKIM_INVALID,DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE, SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2B084C433E0 for ; Fri, 15 May 2020 15:07:35 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 07C252075F for ; Fri, 15 May 2020 15:07:35 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=mg.codeaurora.org header.i=@mg.codeaurora.org header.b="vhExOYJ6" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726295AbgEOPHe (ORCPT ); Fri, 15 May 2020 11:07:34 -0400 Received: from mail26.static.mailgun.info ([104.130.122.26]:44630 "EHLO mail26.static.mailgun.info" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726188AbgEOPHe (ORCPT ); Fri, 15 May 2020 11:07:34 -0400 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1589555253; h=Message-ID: References: In-Reply-To: Subject: Cc: To: From: Date: Content-Transfer-Encoding: Content-Type: MIME-Version: Sender; bh=GD3MSVnurBHbUadPkaSVqaLd1/4uCYhA66rh1sVq/Fc=; b=vhExOYJ6n/SzUz7BG0k0tJCGPx8dSqawdByQg1nPVOwnjU8LAm/+cd2epQYjF82MpLMwG6dm 1kA1YCCD8plW53T3o/WTWpgb1JCHsKfW5xOfBeBMxMWp1X0JenJyPBjn3fugZl5/8eqeB05y c738hfovVi8f3CeLvMlk2BQHFGM= X-Mailgun-Sending-Ip: 104.130.122.26 X-Mailgun-Sid: WyI1MzIzYiIsICJsaW51eC1hcm0tbXNtQHZnZXIua2VybmVsLm9yZyIsICJiZTllNGEiXQ== Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by smtp-out-n02.prod.us-east-1.postgun.com with SMTP id 5ebeb02775dd50406e3fe211 (version=TLS1.2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256); Fri, 15 May 2020 15:07:19 GMT Received: by smtp.codeaurora.org (Postfix, from userid 1001) id CAF95C43636; Fri, 15 May 2020 15:07:18 +0000 (UTC) Received: from mail.codeaurora.org (localhost.localdomain [127.0.0.1]) (using TLSv1 with cipher ECDHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) (Authenticated sender: saiprakash.ranjan) by smtp.codeaurora.org (Postfix) with ESMTPSA id A1BF8C433F2; Fri, 15 May 2020 15:07:13 +0000 (UTC) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII; format=flowed Content-Transfer-Encoding: 7bit Date: Fri, 15 May 2020 20:37:13 +0530 From: Sai Prakash Ranjan To: Mathieu Poirier Cc: Suzuki K Poulose , linux-arm-msm , Coresight ML , Linux Kernel Mailing List , Stephen Boyd , Tingwei Zhang , Leo Yan , linux-arm-kernel , Mike Leach Subject: Re: [PATCH] coresight: etm4x: Add support to disable trace unit power up In-Reply-To: References: <20200514105915.27516-1-saiprakash.ranjan@codeaurora.org> <20200514180055.GA29384@xps15> <2c932d57288508cc72a6ee323cf5595e@codeaurora.org> Message-ID: X-Sender: saiprakash.ranjan@codeaurora.org User-Agent: Roundcube Webmail/1.3.9 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Hi Mathieu, On 2020-05-15 20:22, Mathieu Poirier wrote: > On Thu, 14 May 2020 at 12:39, Sai Prakash Ranjan > wrote: >> >> Hi Mathieu, >> >> On 2020-05-14 23:30, Mathieu Poirier wrote: >> > Good morning Sai, >> > >> > On Thu, May 14, 2020 at 04:29:15PM +0530, Sai Prakash Ranjan wrote: >> >> From: Tingwei Zhang >> >> >> >> On some Qualcomm Technologies Inc. SoCs like SC7180, there >> >> exists a hardware errata where the APSS (Application Processor >> >> SubSystem)/CPU watchdog counter is stopped when ETM register >> >> TRCPDCR.PU=1. >> > >> > Fun stuff... >> > >> >> Yes :) >> >> >> Since the ETMs share the same power domain as >> >> that of respective CPU cores, they are powered on when the >> >> CPU core is powered on. So we can disable powering up of the >> >> trace unit after checking for this errata via new property >> >> called "qcom,tupwr-disable". >> >> >> >> Signed-off-by: Tingwei Zhang >> >> Co-developed-by: Sai Prakash Ranjan >> >> Signed-off-by: Sai Prakash Ranjan >> > >> > Co-developed-by: Sai Prakash Ranjan >> > Signed-off-by: Tingwei Zhang >> > >> >> Tingwei is the author, so if I understand correctly, his signed-off-by >> should appear first, am I wrong? > > It's a gray area and depends on who's code is more prevalent in the > patch. If Tingwei wrote the most of the code then his name is in the > "from:" section, yours as co-developer and he signs off on it (as I > suggested). If you did most of the work then it is the opposite. > Adding a Co-developed and a signed-off with the same name doesn't make > sense. > I did check the documentation for submitting patches: Documentation/process/submitting-patches.rst. And it clearly states that "Co-developed-by must be followed by Signed-off by the co-author and the last Signed-off-by: must always be that of the developer submitting the patch". Quoting below from the doc: Co-developed-by: ...Since Co-developed-by: denotes authorship, every Co-developed-by: must be immediately followed by a Signed-off-by: of the associated co-author. Standard sign-off procedure applies, i.e. the ordering of Signed-off-by: tags should reflect the chronological history of the patch insofar as possible, regardless of whether the author is attributed via From: or Co-developed-by:. Notably, the last Signed-off-by: must always be that of the developer submitting the patch. >> >> >> --- >> >> .../devicetree/bindings/arm/coresight.txt | 6 ++++ >> >> drivers/hwtracing/coresight/coresight-etm4x.c | 29 >> >> ++++++++++++------- >> > >> > Please split in two patches. >> > >> >> Sure, I will split the dt-binding into separate patch, checkpatch did >> warn. > > And you still sent me the patch... I usually run checkpatch before > all the submissions I review and flatly ignore patches that return > errors. You got lucky... > I did not mean to ignore it or else I wouldn't have run checkpatch itself. I checked other cases like "arm,scatter-gather" where the binding and the driver change was in a single patch, hence I thought it's not a very strict rule. Thanks, Sai -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.8 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A046CC433E1 for ; Fri, 15 May 2020 15:07:41 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 744322076A for ; Fri, 15 May 2020 15:07:41 +0000 (UTC) Authentication-Results: mail.kernel.org; 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Fri, 15 May 2020 15:07:13 +0000 (UTC) MIME-Version: 1.0 Date: Fri, 15 May 2020 20:37:13 +0530 From: Sai Prakash Ranjan To: Mathieu Poirier Subject: Re: [PATCH] coresight: etm4x: Add support to disable trace unit power up In-Reply-To: References: <20200514105915.27516-1-saiprakash.ranjan@codeaurora.org> <20200514180055.GA29384@xps15> <2c932d57288508cc72a6ee323cf5595e@codeaurora.org> Message-ID: X-Sender: saiprakash.ranjan@codeaurora.org User-Agent: Roundcube Webmail/1.3.9 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200515_080735_900824_E8813528 X-CRM114-Status: GOOD ( 21.65 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Suzuki K Poulose , linux-arm-msm , Coresight ML , Linux Kernel Mailing List , Stephen Boyd , Tingwei Zhang , Leo Yan , linux-arm-kernel , Mike Leach Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Mathieu, On 2020-05-15 20:22, Mathieu Poirier wrote: > On Thu, 14 May 2020 at 12:39, Sai Prakash Ranjan > wrote: >> >> Hi Mathieu, >> >> On 2020-05-14 23:30, Mathieu Poirier wrote: >> > Good morning Sai, >> > >> > On Thu, May 14, 2020 at 04:29:15PM +0530, Sai Prakash Ranjan wrote: >> >> From: Tingwei Zhang >> >> >> >> On some Qualcomm Technologies Inc. SoCs like SC7180, there >> >> exists a hardware errata where the APSS (Application Processor >> >> SubSystem)/CPU watchdog counter is stopped when ETM register >> >> TRCPDCR.PU=1. >> > >> > Fun stuff... >> > >> >> Yes :) >> >> >> Since the ETMs share the same power domain as >> >> that of respective CPU cores, they are powered on when the >> >> CPU core is powered on. So we can disable powering up of the >> >> trace unit after checking for this errata via new property >> >> called "qcom,tupwr-disable". >> >> >> >> Signed-off-by: Tingwei Zhang >> >> Co-developed-by: Sai Prakash Ranjan >> >> Signed-off-by: Sai Prakash Ranjan >> > >> > Co-developed-by: Sai Prakash Ranjan >> > Signed-off-by: Tingwei Zhang >> > >> >> Tingwei is the author, so if I understand correctly, his signed-off-by >> should appear first, am I wrong? > > It's a gray area and depends on who's code is more prevalent in the > patch. If Tingwei wrote the most of the code then his name is in the > "from:" section, yours as co-developer and he signs off on it (as I > suggested). If you did most of the work then it is the opposite. > Adding a Co-developed and a signed-off with the same name doesn't make > sense. > I did check the documentation for submitting patches: Documentation/process/submitting-patches.rst. And it clearly states that "Co-developed-by must be followed by Signed-off by the co-author and the last Signed-off-by: must always be that of the developer submitting the patch". Quoting below from the doc: Co-developed-by: ...Since Co-developed-by: denotes authorship, every Co-developed-by: must be immediately followed by a Signed-off-by: of the associated co-author. Standard sign-off procedure applies, i.e. the ordering of Signed-off-by: tags should reflect the chronological history of the patch insofar as possible, regardless of whether the author is attributed via From: or Co-developed-by:. Notably, the last Signed-off-by: must always be that of the developer submitting the patch. >> >> >> --- >> >> .../devicetree/bindings/arm/coresight.txt | 6 ++++ >> >> drivers/hwtracing/coresight/coresight-etm4x.c | 29 >> >> ++++++++++++------- >> > >> > Please split in two patches. >> > >> >> Sure, I will split the dt-binding into separate patch, checkpatch did >> warn. > > And you still sent me the patch... I usually run checkpatch before > all the submissions I review and flatly ignore patches that return > errors. You got lucky... > I did not mean to ignore it or else I wouldn't have run checkpatch itself. I checked other cases like "arm,scatter-gather" where the binding and the driver change was in a single patch, hence I thought it's not a very strict rule. Thanks, Sai -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel