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Ip=[165.204.84.17]; Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MN1PEPF0000ECD4.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ1PR12MB6074 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" On 8/13/26 11:29, Taimuraz Kaitmazov wrote: > Resending: my earlier reply does not appear on the lists, so I assume it > did not reach you either. > > On 8/13/26 20:08, Lizhi Hou wrote: >> The legacy NPU device is not cache coherent. And the next generation >> (aie4) devices will be cache coherent. > Confirming that with numbers, since I had measured it before your reply > landed. On npu4, without a flush the CPU reads what the buffer held > before the NPU wrote it, and the NPU reads what DRAM held before the CPU > wrote it. Both reproduce on all 20 runs, and the stale read is most of > the buffer, not a stray line: 3931 of 4096 values on average. > > Good to know aie4 is coherent -- that makes anything we do here a > legacy-only concern. > > On 8/13/26 09:44, Christian König wrote: >> An alternative would be to use DMA_BUF_IOCTL_SYNC from userspace > Tried it against amdgpu, imported into amdxdna: stale on all 20 runs, no > better than no sync at all. SYNC_BO on the same buffer is clean on all > 20. > > Which leaves me no legal way to import a buffer the CPU also reads. Is > there one I'm missing, or should a device like this just not import? > > On 8/12/26 17:45, Lizhi Hou wrote: >> we need to unconditionally return -EOPNOTSUPP for imported BO > is_import_bo() also covers ubuf and cbuf, so that stops maintaining our > own userptr and carve-out BOs too. They take that arm today: on a 64 MiB > userptr BO a 4 KiB sync and a full sync both cost 659 us, so the range > is already being ignored there. I am working on removing the dma-buf part for ubuf BO because that is also not a good usage of dma-buf. So the ubuf will be a object soon. cbuf is mainly for debug and is disabled by default. Lizhi > > Keying on dma_buf->ops instead would confine it to foreign buffers. > Either is fine by me, tell me which you want. > > Separately: XRT's buffer::sync() clflushes in userspace unless > Debug.force_driver_sync is set, so the stack does this to foreign > dma-bufs whatever the driver does. And when the ioctl is used, a > FROM_DEVICE sync returns -EINVAL after the flush has already run, out of > amdxdna_hwctx_sync_debug_bo() when the BO has no assigned hwctx. Happy > to send that as its own patch; the helper has one caller, so returning 0 > there is the obvious shape unless you want it done elsewhere. > > v3 is sent: patches 1, 3 and 4 only. Patch 5 is dropped, and 2 with it > since it only serves 5. I have not tested 5 on a matching tree and its > numbers came from the foreign import case. > > Taimuraz > >