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boundary="------------2GJXSkpPzWLK9PGXTwx56OJm" Message-ID: Date: Thu, 3 Sep 2026 12:02:38 -0500 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v6 0/9] pnv/phb5: Update PHB4 to the latest PHB5 spec To: Saif Abrar , qemu-ppc@nongnu.org, qemu-devel@nongnu.org Cc: harshpb@linux.ibm.com, clg@kaod.org, npiggin@gmail.com, fbarrat@linux.ibm.com, mst@redhat.com, marcel.apfelbaum@gmail.com, cohuck@redhat.com, pbonzini@redhat.com, thuth@redhat.com, lvivier@redhat.com, danielhb413@gmail.com, chalapathi.v@linux.ibm.com, calebs@linux.ibm.com, milesg@linux.ibm.com, jishnuvw@linux.ibm.com, adityag@linux.ibm.com, amachhiw@linux.ibm.com References: <20260831123005.1485518-1-saif.abrar@linux.ibm.com> Content-Language: en-US From: Mike Kowal In-Reply-To: <20260831123005.1485518-1-saif.abrar@linux.ibm.com> X-TM-AS-GCONF: 00 X-Proofpoint-Reinject: loops=2 maxloops=12 X-Proofpoint-GUID: JIuepUVTECB73BON3pQLc7Q0Dz8YgrBl X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTAzMDE0OCBTYWx0ZWRfX8X4hh0K6xqjy 9iVGE1m1eaTJ58HU/TFDT1BgzM235en0kOABi1Cc4bCvlGHi+B/2tET1S9Wzyx3w+B37taeT0kC 2kQouJXToPUZCtt3D3iYMtYa0g7Sr/HRqYh644Yg6UdfrXVY+X1j1dQHz0qpVuTHEASlvrIsqKP dLH0sj74KDjylqkBO4GIGV8nADCJ3IG8cCbz3OTrCgYsoac700oSnrofeoc9xfRYJdpQNa0djhF Fz6XN2tbuaewI+97VBHCMJFIV3v8/5ZKOcMTmYcbkJ5xYrnWZwjJEVke1hBIokmb2fVc8WHR1OI iOJZvpUZhTLoNuyQz2P7V447I9CuGD3D9+KUAY5EdvELKVKFxT4xsyC0S//p20f4YVC5ADRNDEX QK7Z8fbgChRrsVPq16IPmaaaGWW4mlvheyXR5OHHuF34NvPDpQ3ITtogGn9w8CgNhKU2XYEGaa0 diXBYh0P7uoibkMfDCg== X-Authority-Analysis: v=2.4 cv=Osl/DS/t c=1 sm=1 tr=0 ts=6a99a834 cx=c_pps a=5BHTudwdYE3Te8bg5FgnPg==:117 a=5BHTudwdYE3Te8bg5FgnPg==:17 a=VdqzKS8jKosA:10 a=VkNPw1HP01LnGYTKEx00:22 a=RnoormkPH1_aCDwRdu11:22 a=Y2IxJ9c9Rs8Kov3niI8_:22 a=r77TgQKjGQsHNAKrUKIA:9 a=VwQbUJbxAAAA:8 a=VnNF1IyMAAAA:8 a=N1-tE7rikoB3GCo6Uq0A:9 a=QEXdDO2ut3YA:10 a=4_wdIL-PfShv4t6dFjgA:9 a=giwTRlLOBNvZoAlH:21 a=_W_S_7VecoQA:10 a=lqcHg5cX4UMA:10 X-Proofpoint-Spam-Info: AW1haW4tMjYwOTAzMDE0OCBTYWx0ZWRfX2NV9e1xckv28 4J0HSsyS0XG9VGTouJBj8OQ5xf8sQrTvYMz7jqdH36ohs+qYSTye0lzxH+DNF0hcRsXeY9+fzt1 B0VnQkVV4KBfrodfhZGeTccX5gpHY8A= X-Proofpoint-ORIG-GUID: pEYmEYGqeLAU2bvUD_uFNRjFOCixwYpe X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-03_05,2026-09-03_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 malwarescore=0 suspectscore=0 bulkscore=0 lowpriorityscore=0 adultscore=0 impostorscore=0 phishscore=0 clxscore=1015 priorityscore=1501 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2609030148 Received-SPF: pass client-ip=148.163.158.5; envelope-from=kowal@linux.ibm.com; helo=mx0b-001b2d01.pphosted.com X-Spam_score_int: -26 X-Spam_score: -2.7 X-Spam_bar: -- X-Spam_report: (-2.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, HTML_MESSAGE=0.001, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org This is a multi-part message in MIME format. --------------2GJXSkpPzWLK9PGXTwx56OJm Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Reviewed-by: Michael Kowal Thanks, MAK On 8/31/2026 7:29 AM, Saif Abrar wrote: > Hello, > This patchset resolves the review comments for v5: > https://lore.kernel.org/qemu-devel/20260617095058.652789-1-saif.abrar@linux.ibm.com/ > > Major updates include the following: > - Separate reset and register read/write methods for PHB5. > - PHB4 and PHB5 specific reset values. > - Read/write logic for registers added and removed in PHB5. > - General cleanups. > > Tested with 'make check' and 'make check-functional-ppc64'. > > Regards. > > Saif Abrar (9): > qtest/phb5: Add testbench for PHB > pnv/phb5: Add reset logic to PHB5 > pnv/phb5: Implement sticky reset logic in PHB5 > pnv/phb5: Implement read-only and write-only bits of registers > pnv/phb5: Implement write-clear and return 1's on unimplemented reg > read > pnv/phb5: Set link-active status in HPSTAT and LMR registers > pnv/phb5: Set link speed and width in the DLP training control > register > pnv/phb5: Implement IODA PCT table > pnv/phb5: Mask off LSI Source-ID based on number of interrupts > > hw/pci-host/pnv_phb.c | 20 +- > hw/pci-host/pnv_phb4.c | 552 +++++++++++++++++++++++++--- > hw/pci-host/pnv_phb4_pec.c | 2 +- > hw/pci-host/pnv_phb5.c | 197 +++++++++- > hw/pci-host/pnv_phb5_pec.c | 1 + > hw/ppc/pnv.c | 1 + > include/hw/pci-host/pnv_phb4.h | 43 ++- > include/hw/pci-host/pnv_phb4_regs.h | 58 ++- > include/hw/pci-host/pnv_phb5.h | 52 +++ > tests/qtest/meson.build | 1 + > tests/qtest/pnv-host-i2c-test.c | 13 +- > tests/qtest/pnv-phb-test.c | 235 ++++++++++++ > tests/qtest/pnv-qtest-common.h | 24 ++ > tests/qtest/pnv-xive2-common.h | 7 +- > 14 files changed, 1102 insertions(+), 104 deletions(-) > create mode 100644 include/hw/pci-host/pnv_phb5.h > create mode 100644 tests/qtest/pnv-phb-test.c > create mode 100644 tests/qtest/pnv-qtest-common.h > --------------2GJXSkpPzWLK9PGXTwx56OJm Content-Type: text/html; charset=UTF-8 Content-Transfer-Encoding: 7bit 

Reviewed-by: Michael Kowal <kowal@linux.ibm.com>

Thanks, MAK


On 8/31/2026 7:29 AM, Saif Abrar wrote:
Hello,
This patchset resolves the review comments for v5:
https://lore.kernel.org/qemu-devel/20260617095058.652789-1-saif.abrar@linux.ibm.com/

Major updates include the following:
- Separate reset and register read/write methods for PHB5.
- PHB4 and PHB5 specific reset values.
- Read/write logic for registers added and removed in PHB5.
- General cleanups.

Tested with 'make check' and 'make check-functional-ppc64'.

Regards.

Saif Abrar (9):
  qtest/phb5: Add testbench for PHB
  pnv/phb5: Add reset logic to PHB5
  pnv/phb5: Implement sticky reset logic in PHB5
  pnv/phb5: Implement read-only and write-only bits of registers
  pnv/phb5: Implement write-clear and return 1's on unimplemented reg
    read
  pnv/phb5: Set link-active status in HPSTAT and LMR registers
  pnv/phb5: Set link speed and width in the DLP training control
    register
  pnv/phb5: Implement IODA PCT table
  pnv/phb5: Mask off LSI Source-ID based on number of interrupts

 hw/pci-host/pnv_phb.c               |  20 +-
 hw/pci-host/pnv_phb4.c              | 552 +++++++++++++++++++++++++---
 hw/pci-host/pnv_phb4_pec.c          |   2 +-
 hw/pci-host/pnv_phb5.c              | 197 +++++++++-
 hw/pci-host/pnv_phb5_pec.c          |   1 +
 hw/ppc/pnv.c                        |   1 +
 include/hw/pci-host/pnv_phb4.h      |  43 ++-
 include/hw/pci-host/pnv_phb4_regs.h |  58 ++-
 include/hw/pci-host/pnv_phb5.h      |  52 +++
 tests/qtest/meson.build             |   1 +
 tests/qtest/pnv-host-i2c-test.c     |  13 +-
 tests/qtest/pnv-phb-test.c          | 235 ++++++++++++
 tests/qtest/pnv-qtest-common.h      |  24 ++
 tests/qtest/pnv-xive2-common.h      |   7 +-
 14 files changed, 1102 insertions(+), 104 deletions(-)
 create mode 100644 include/hw/pci-host/pnv_phb5.h
 create mode 100644 tests/qtest/pnv-phb-test.c
 create mode 100644 tests/qtest/pnv-qtest-common.h
--------------2GJXSkpPzWLK9PGXTwx56OJm--