From: Nikhil Kumar Singh <nikhilks@linux.ibm.com>
To: Gautam Menghani <gautam@linux.ibm.com>,
milesg@linux.ibm.com, clg@kaod.org, harshpb@linux.ibm.com
Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org
Subject: Re: [PATCH] ppc/xive: Trigger the pending interrupt for a guest after migration
Date: Tue, 25 Aug 2026 10:55:48 +0530 [thread overview]
Message-ID: <a45db1dd-fef3-4ca3-aa07-953cce6193ed@linux.ibm.com> (raw)
In-Reply-To: <20260824070353.40016-1-gautam@linux.ibm.com>
On 24/08/26 12:33, Gautam Menghani wrote:
Hi Gautam,
I was going through the implementation and had a small doubt regarding
the scope of the fix for the TIMA rings. I can see that we are
explicitly reading and setting the PIPR for TM_QW1_OS:
> + } else {
> + uint8_t pipr = tctx->regs[TM_QW1_OS + TM_PIPR];
> + xive_tctx_pipr_set(tctx, TM_QW1_OS, pipr, 0);
> }
I guess vmstate_xive_tctx_post_load is a shared device code, I was
wondering what happens in the case of the other rings? Should we also
force a re-evaluation for TM_QW3_HV_PHYS or TM_QW2_HV_POOL to avoid
similar lockups in those configurations? Or is this issue strictly
coming only in the OS ring in practical scenarios? Please let me know
your thoughts on this.
Also, one minor suggestion. Since this logic is going inside the else
block of if (kvm_irqchip_in_kernel()), I feel it would be better if we
can add a line in the commit message mentioning that this specifically
fixes state restoration for environments relying on QEMU's emulated XIVE.
Thanks
~ Nikhil
next prev parent reply other threads:[~2026-08-25 5:26 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-24 7:03 [PATCH] ppc/xive: Trigger the pending interrupt for a guest after migration Gautam Menghani
2026-08-24 20:31 ` Anushree Mathur
2026-08-25 5:25 ` Nikhil Kumar Singh [this message]
2026-08-25 7:50 ` Gautam Menghani
2026-08-25 8:17 ` Nikhil Kumar Singh
2026-08-25 14:42 ` Miles Glenn
2026-08-25 16:23 ` Mike Kowal
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