From: Reinette Chatre <reinette.chatre@intel.com>
To: Kohei Tarumizu <tarumizu.kohei@fujitsu.com>,
<fenghua.yu@intel.com>, <tglx@linutronix.de>, <mingo@redhat.com>,
<bp@alien8.de>, <dave.hansen@linux.intel.com>, <x86@kernel.org>,
<hpa@zytor.com>, <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH] x86/resctrl: Fix to restore to original value when re-enabling hardware prefetch register
Date: Tue, 24 May 2022 11:38:10 -0700 [thread overview]
Message-ID: <a88900f6-da2f-d641-fb6d-7952b60cf200@intel.com> (raw)
In-Reply-To: <20220518045517.2066518-1-tarumizu.kohei@fujitsu.com>
On 5/17/2022 9:55 PM, Kohei Tarumizu wrote:
> The current pseudo_lock.c code overwrites the value of the
> MSR_MISC_FEATURE_CONTROL to 0 even if the original value is not 0.
> Therefore, modify it to save and restore the original values.
>
> Fixes: 018961ae5579 ("x86/intel_rdt: Pseudo-lock region creation/removal core")
> Fixes: 443810fe6160 ("x86/intel_rdt: Create debugfs files for pseudo-locking testing")
> Fixes: 8a2fc0e1bc0c ("x86/intel_rdt: More precise L2 hit/miss measurements")
> Signed-off-by: Kohei Tarumizu <tarumizu.kohei@fujitsu.com>
> ---
Thank you very much for catching this.
Acked-by: Reinette Chatre <reinette.chatre@intel.com>
Reinette
next prev parent reply other threads:[~2022-05-24 18:38 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-18 4:55 [PATCH] x86/resctrl: Fix to restore to original value when re-enabling hardware prefetch register Kohei Tarumizu
2022-05-24 18:38 ` Reinette Chatre [this message]
2022-05-24 18:41 ` Dave Hansen
2022-05-24 18:56 ` Reinette Chatre
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