All of lore.kernel.org
 help / color / mirror / Atom feed
From: Felix Kuehling <felix.kuehling@amd.com>
To: Alex Deucher <alexdeucher@gmail.com>, Alex Sierra <alex.sierra@amd.com>
Cc: amd-gfx list <amd-gfx@lists.freedesktop.org>
Subject: Re: [PATCH] drm/amdgpu: enable ih1 ih2 for Arcturus only
Date: Wed, 2 Sep 2020 14:10:48 -0400	[thread overview]
Message-ID: <a973acd3-e07a-2e81-c2f0-e1da707155f6@amd.com> (raw)
In-Reply-To: <CADnq5_NRFr5vYfuwgMHQ5Y+19_UqXPoJYomBkwGMoWkvjpA_Fw@mail.gmail.com>

Am 2020-09-02 um 2:08 p.m. schrieb Alex Deucher:
> On Wed, Sep 2, 2020 at 1:01 PM Alex Sierra <alex.sierra@amd.com> wrote:
>> Enable multi-ring ih1 and ih2 for Arcturus only.
>> For Navi10 family multi-ring has been disabled.
>> Apparently, having multi-ring enabled in Navi was causing
>> continus page fault interrupts.
>> Further investigation is needed to get to the root cause.
>> Related issue link:
>> https://gitlab.freedesktop.org/drm/amd/-/issues/1279
>>
> Before committing, let's verify that it fixes that issue.

Has anyone reproduced this in AMD? Or should we ask the gitlab issue
reporter to test the patch?

Thanks,
  Felix


>
> Alex
>
>
>> Signed-off-by: Alex Sierra <alex.sierra@amd.com>
>> ---
>>  drivers/gpu/drm/amd/amdgpu/navi10_ih.c | 30 ++++++++++++++++----------
>>  1 file changed, 19 insertions(+), 11 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/amd/amdgpu/navi10_ih.c b/drivers/gpu/drm/amd/amdgpu/navi10_ih.c
>> index 350f1bf063c6..4d73869870ab 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/navi10_ih.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/navi10_ih.c
>> @@ -306,7 +306,8 @@ static int navi10_ih_irq_init(struct amdgpu_device *adev)
>>         } else {
>>                 WREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL, ih_rb_cntl);
>>         }
>> -       navi10_ih_reroute_ih(adev);
>> +       if (adev->asic_type == CHIP_ARCTURUS)
>> +               navi10_ih_reroute_ih(adev);
>>
>>         if (unlikely(adev->firmware.load_type == AMDGPU_FW_LOAD_DIRECT)) {
>>                 if (ih->use_bus_addr) {
>> @@ -668,19 +669,26 @@ static int navi10_ih_sw_init(void *handle)
>>         adev->irq.ih.use_doorbell = true;
>>         adev->irq.ih.doorbell_index = adev->doorbell_index.ih << 1;
>>
>> -       r = amdgpu_ih_ring_init(adev, &adev->irq.ih1, PAGE_SIZE, true);
>> -       if (r)
>> -               return r;
>> +       adev->irq.ih1.ring_size = 0;
>> +       adev->irq.ih2.ring_size = 0;
>>
>> -       adev->irq.ih1.use_doorbell = true;
>> -       adev->irq.ih1.doorbell_index = (adev->doorbell_index.ih + 1) << 1;
>> +       if (adev->asic_type == CHIP_ARCTURUS) {
>> +               r = amdgpu_ih_ring_init(adev, &adev->irq.ih1, PAGE_SIZE, true);
>> +               if (r)
>> +                       return r;
>>
>> -       r = amdgpu_ih_ring_init(adev, &adev->irq.ih2, PAGE_SIZE, true);
>> -       if (r)
>> -               return r;
>> +               adev->irq.ih1.use_doorbell = true;
>> +               adev->irq.ih1.doorbell_index =
>> +                                       (adev->doorbell_index.ih + 1) << 1;
>> +
>> +               r = amdgpu_ih_ring_init(adev, &adev->irq.ih2, PAGE_SIZE, true);
>> +               if (r)
>> +                       return r;
>>
>> -       adev->irq.ih2.use_doorbell = true;
>> -       adev->irq.ih2.doorbell_index = (adev->doorbell_index.ih + 2) << 1;
>> +               adev->irq.ih2.use_doorbell = true;
>> +               adev->irq.ih2.doorbell_index =
>> +                                       (adev->doorbell_index.ih + 2) << 1;
>> +       }
>>
>>         r = amdgpu_irq_init(adev);
>>
>> --
>> 2.17.1
>>
>> _______________________________________________
>> amd-gfx mailing list
>> amd-gfx@lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

  reply	other threads:[~2020-09-02 18:10 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-09-02 17:01 [PATCH] drm/amdgpu: enable ih1 ih2 for Arcturus only Alex Sierra
2020-09-02 17:13 ` Felix Kuehling
2020-09-02 18:08 ` Alex Deucher
2020-09-02 18:10   ` Felix Kuehling [this message]
2020-09-02 18:16     ` Alex Deucher
2020-09-02 18:13   ` Alex Deucher
2020-09-02 18:28     ` Felix Kuehling
2020-09-03  8:05       ` Christian König
2020-09-07  5:00         ` Matt Coffin
2020-09-08  4:52           ` Felix Kuehling

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=a973acd3-e07a-2e81-c2f0-e1da707155f6@amd.com \
    --to=felix.kuehling@amd.com \
    --cc=alex.sierra@amd.com \
    --cc=alexdeucher@gmail.com \
    --cc=amd-gfx@lists.freedesktop.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.