From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7FC4221127E for ; Fri, 18 Apr 2025 20:49:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1745009344; cv=none; b=HZTXPI0UN/pbsZQuycE0fxKoGVLl6s7VWoNR8e7XQuP8xCkA+Z7nSRTTsGHaVngmNONfreN1/7Ye7QOhcA2b1PrCT7jqlwWJcawMaBHCT4CrzXrrlLidDbBQ51AUmq+EXFajuNIwL62oUmDVbxF/CxsMH3HOjPmCdFJh+jfuzwA= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1745009344; c=relaxed/simple; bh=o6rWC2OdM2Kqh/YVF0TxD6ZhXq/Hm3vxJRNKeDi3SB0=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=nRFPtCM1G+dD1tS6+oUHnP9lKUYZAnE2+N8khRowRcD/CD7tmUyLvTRyyDALzEeHwaHy10mNlsQrQT8w+4ZqXHyAamMzqX+JUpHPcgOVaMRjXVI3dtVCoNUcYvaDUxQlHIs1nCchaMzY+URrxpn9TjuzyX1dCQDTd47GnNGZ6sg= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 Received: by smtp.kernel.org (Postfix) with ESMTPSA id 7E07CC4CEE2; Fri, 18 Apr 2025 20:49:02 +0000 (UTC) Date: Fri, 18 Apr 2025 21:49:00 +0100 From: Catalin Marinas To: Marc Zyngier Cc: linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, Ada Couprie Diaz , Will Deacon , Shameer Kolothum , Oliver Upton Subject: Re: [PATCH v2] arm64: Rework checks for broken Cavium HW in the PI code Message-ID: References: <20250418093129.1755739-1-maz@kernel.org> Precedence: bulk X-Mailing-List: kvmarm@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20250418093129.1755739-1-maz@kernel.org> On Fri, Apr 18, 2025 at 10:31:29AM +0100, Marc Zyngier wrote: > Calling into the MIDR checking framework from the PI code has recently > become much harder, due to the new fancy "multi-MIDR" support that > relies on tables being populated at boot time, but not that early that > they are available to the PI code. There are additional issues with > this framework, as the code really isn't position independend *at all*. > > This leads to some ugly breakages, as reported by Ada. > > It so appears that the only reason for the PI code to call into the > MIDR checking code is to cope with The Most Broken ARM64 System Ever, > aka Cavium ThunderX, which cannot deal with nG attributes that result > of the combination of KASLR and KPTI as a consequence of Erratum 27456. > > Duplicate the check for the erratum in the PI code, removing the > dependency on the bulk of the MIDR checking framework. This allows > dropping that same check from kaslr_requires_kpti(), as the KPTI code > already relies on the ARM64_WORKAROUND_CAVIUM_27456 cap. > > Fixes: c8c2647e69bed ("arm64: Make  _midr_in_range_list() an exported function") > Reported-by: Ada Couprie Diaz > Signed-off-by: Marc Zyngier > Link: https://lore.kernel.org/r/3d97e45a-23cf-419b-9b6f-140b4d88de7b@arm.com > Cc: Catalin Marinas > Cc: Will Deacon > Cc: Shameer Kolothum > Cc: Oliver Upton Reviewed-by: Catalin Marinas Oliver, if you are in a timezone where you are still working, please pick it up. I might not have time until Monday otherwise. Thanks. -- Catalin From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1AB12C369AB for ; Fri, 18 Apr 2025 20:51:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:In-Reply-To: Content-Transfer-Encoding:Content-Type:MIME-Version:References:Message-ID: Subject:To:From:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=V+8oVML2NrBbNu6T1OiR5HS57Y0ejNxUZksaivZAZ8c=; b=4t/n3pYhXKM9q7j8eSm4DMbbi3 dDy64phdWthnzjuaUm4CQsTyYtHENo4cKNPxHBVfvqWnsWCGyDLYHbdRClhgWKQgE2yp3yoL9Nm8j bsscWn9bjtWHt+Kkpnhv4JIi1M+WQ/Fxs4c5RDMPneBNBcPFalBRPzU0Fbt1yJXHh4zxXEUm0pwWi o4MhRC6FoWUaABSmfU0sn45ZDyn/nuoL1PgtGTcfaaEPkVdZVg+DbWXUvGDW9PFlqxx8z0ZSpB6kR 4QJmEteOyCSgj8548/eJxArKXa24gKi0X4o3XC7uxpD4WFTDf1VIhGJ3/PAJh1V+lTgshlDx6c3cz 9OYye5dQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98.2 #2 (Red Hat Linux)) id 1u5sfx-00000000E6W-2U0l; Fri, 18 Apr 2025 20:51:05 +0000 Received: from tor.source.kernel.org ([2600:3c04:e001:324:0:1991:8:25]) by bombadil.infradead.org with esmtps (Exim 4.98.2 #2 (Red Hat Linux)) id 1u5se1-00000000DXC-1UPN for linux-arm-kernel@lists.infradead.org; Fri, 18 Apr 2025 20:49:05 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by tor.source.kernel.org (Postfix) with ESMTP id CAACF61120; Fri, 18 Apr 2025 20:48:45 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 7E07CC4CEE2; Fri, 18 Apr 2025 20:49:02 +0000 (UTC) Date: Fri, 18 Apr 2025 21:49:00 +0100 From: Catalin Marinas To: Marc Zyngier Subject: Re: [PATCH v2] arm64: Rework checks for broken Cavium HW in the PI code Message-ID: References: <20250418093129.1755739-1-maz@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20250418093129.1755739-1-maz@kernel.org> X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Oliver Upton , Shameer Kolothum , kvmarm@lists.linux.dev, Will Deacon , linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Fri, Apr 18, 2025 at 10:31:29AM +0100, Marc Zyngier wrote: > Calling into the MIDR checking framework from the PI code has recently > become much harder, due to the new fancy "multi-MIDR" support that > relies on tables being populated at boot time, but not that early that > they are available to the PI code. There are additional issues with > this framework, as the code really isn't position independend *at all*. > > This leads to some ugly breakages, as reported by Ada. > > It so appears that the only reason for the PI code to call into the > MIDR checking code is to cope with The Most Broken ARM64 System Ever, > aka Cavium ThunderX, which cannot deal with nG attributes that result > of the combination of KASLR and KPTI as a consequence of Erratum 27456. > > Duplicate the check for the erratum in the PI code, removing the > dependency on the bulk of the MIDR checking framework. This allows > dropping that same check from kaslr_requires_kpti(), as the KPTI code > already relies on the ARM64_WORKAROUND_CAVIUM_27456 cap. > > Fixes: c8c2647e69bed ("arm64: Make  _midr_in_range_list() an exported function") > Reported-by: Ada Couprie Diaz > Signed-off-by: Marc Zyngier > Link: https://lore.kernel.org/r/3d97e45a-23cf-419b-9b6f-140b4d88de7b@arm.com > Cc: Catalin Marinas > Cc: Will Deacon > Cc: Shameer Kolothum > Cc: Oliver Upton Reviewed-by: Catalin Marinas Oliver, if you are in a timezone where you are still working, please pick it up. I might not have time until Monday otherwise. Thanks. -- Catalin