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From: "Luck, Tony" <tony.luck@intel.com>
To: Zaid Alali <zaidal@os.amperecomputing.com>
Cc: rafael@kernel.org, lenb@kernel.org, james.morse@arm.com,
	bp@alien8.de, robert.moore@intel.com,
	Jonathan.Cameron@huawei.com, ira.weiny@intel.com,
	Benjamin.Cheatham@amd.com, dan.j.williams@intel.com,
	arnd@arndb.de, Avadhut.Naik@amd.com,
	u.kleine-koenig@pengutronix.de, john.allen@amd.com,
	linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org,
	acpica-devel@lists.linux.dev
Subject: Re: [PATCH v6 8/9] ACPI: APEI: EINJ: Enable EINJv2 error injections
Date: Fri, 18 Apr 2025 13:01:55 -0700	[thread overview]
Message-ID: <aAKvs2cDLu_mVGdr@agluck-desk3> (raw)
In-Reply-To: <20250417220019.27898-9-zaidal@os.amperecomputing.com>

On Thu, Apr 17, 2025 at 03:00:18PM -0700, Zaid Alali wrote:
> +			if (is_V2) {
> +				int count = 0, bytes_read, pos = 0, nr_parsed = 0, str_len;
> +				unsigned int comp, synd;

I've been staring at the ACPI spec to try and figure out how many bits
are needed for comp and sync. The example in section 18.6.7 "Error
Injection Version 2 Operation" has this in step 6:

Component Syndrome Array [0] = { 00000000000000000000000000000004 , 000000000000000000000000A5A5A5A5 }

Which really looks like 128-bit values!

So are "unsigned int" adequate? Even "u64" looks like it would fall short.

> +				struct syndrome_array *component_arr;
> +
> +				component_arr = v5param->einjv2_struct.component_arr;
> +				str_len = strlen(user_input);
> +
> +				while ((nr_parsed = sscanf(user_input + pos, "%x %x\n%n", &comp,

Parsing user input with sscanf() is a bit fragile.  Take a look at
rdtgroup_schemata_write() which uses:

	while ((tok = strsep(&buf, "\n")) != NULL) {

to split input into lines, and then strim() and strsep() to break
up items within a line.

> +					&synd, &bytes_read))) {
> +					pos += bytes_read;
> +
> +					if (nr_parsed != 2) {
> +						kfree(v5param);
> +						goto err_out;
> +					}
> +					if (count >= nr_components) {
> +						kfree(v5param);
> +						goto err_out;
> +					}
> +
> +					switch (type) {
> +					case EINJV2_PROCESSOR_ERROR:
> +						component_arr[count].comp_id.acpi_id = comp;
> +						component_arr[count].comp_synd.proc_synd = synd;
> +						break;
> +					case EINJV2_MEMORY_ERROR:
> +						component_arr[count].comp_id.device_id = comp;
> +						component_arr[count].comp_synd.mem_synd = synd;
> +						break;
> +					case EINJV2_PCIE_ERROR:
> +						component_arr[count].comp_id.pcie_sbdf = comp;
> +						component_arr[count].comp_synd.pcie_synd = synd;
> +						break;
> +					}
> +					count++;
> +					if (pos >= str_len)
> +						break;
> +				}
> +				v5param->einjv2_struct.component_arr_count = count;
> +
> +				/* clear buffer after user input for next injection */
> +				memset(user_input, 0, COMP_ARR_SIZE);
> +			} else {

-Tony

  reply	other threads:[~2025-04-18 20:01 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-04-17 22:00 [PATCH v6 0/9] Enable EINJv2 Support Zaid Alali
2025-04-17 22:00 ` [PATCH v6 1/9] ACPICA: Update values to hex to follow ACPI specs Zaid Alali
2025-04-17 22:00 ` [PATCH v6 2/9] ACPICA: Add EINJv2 get error type action Zaid Alali
2025-04-17 22:00 ` [PATCH v6 3/9] ACPI: APEI: EINJ: Fix kernel test sparse warnings Zaid Alali
2025-04-17 22:00 ` [PATCH v6 4/9] ACPI: APEI: EINJ: Remove redundant calls to einj_get_available_error_type Zaid Alali
2025-04-17 22:00 ` [PATCH v6 5/9] ACPI: APEI: EINJ: Enable the discovery of EINJv2 capabilities Zaid Alali
2025-04-18 19:36   ` Luck, Tony
2025-04-17 22:00 ` [PATCH v6 6/9] ACPI: APEI: EINJ: Add einjv2 extension struct Zaid Alali
2025-04-17 22:00 ` [PATCH v6 7/9] ACPI: APEI: EINJ: Add debugfs files for EINJv2 support Zaid Alali
2025-04-17 22:00 ` [PATCH v6 8/9] ACPI: APEI: EINJ: Enable EINJv2 error injections Zaid Alali
2025-04-18 20:01   ` Luck, Tony [this message]
2025-04-22 19:49     ` Zaid Alali
2025-04-17 22:00 ` [PATCH v6 9/9] ACPI: APEI: EINJ: Update the documentation for EINJv2 support Zaid Alali

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