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From: Vinod Koul <vkoul@kernel.org>
To: Fabrizio Castro <fabrizio.castro.jz@renesas.com>
Cc: "Geert Uytterhoeven" <geert+renesas@glider.be>,
	"Magnus Damm" <magnus.damm@gmail.com>,
	"Wolfram Sang" <wsa+renesas@sang-engineering.com>,
	"Lad Prabhakar" <prabhakar.mahadev-lad.rj@bp.renesas.com>,
	"Uwe Kleine-König" <u.kleine-koenig@baylibre.com>,
	"Biju Das" <biju.das.jz@bp.renesas.com>,
	dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-renesas-soc@vger.kernel.org
Subject: Re: [PATCH v6 5/6] dmaengine: sh: rz-dmac: Add RZ/V2H(P) support
Date: Wed, 23 Apr 2025 18:43:23 +0530	[thread overview]
Message-ID: <aAjnc+AxmAn9fxSs@vaman> (raw)
In-Reply-To: <20250422173937.3722875-6-fabrizio.castro.jz@renesas.com>

On 22-04-25, 18:39, Fabrizio Castro wrote:
> The DMAC IP found on the Renesas RZ/V2H(P) family of SoCs is
> similar to the version found on the Renesas RZ/G2L family of
> SoCs, but there are some differences:
> * It only uses one register area
> * It only uses one clock
> * It only uses one reset
> * Instead of using MID/IRD it uses REQ No
> * It is connected to the Interrupt Control Unit (ICU)
> * On the RZ/G2L there is only 1 DMAC, on the RZ/V2H(P) there are 5
> 
> Add specific support for the Renesas RZ/V2H(P) family of SoC by
> tackling the aforementioned differences.
> 
> Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com>
> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---
> v5->v6:
> * Collected tags.
> v4->v5:
> * Reused RZ/G2L cell specification (with REQ No in place of MID/RID).
> * Dropped ACK No.
> * Removed mid_rid/req_no/ack_no union and reused mid_rid for REQ No.
> * Other small improvements.
> v3->v4:
> * Fixed an issue with mid_rid/req_no/ack_no initialization
> v2->v3:
> * Dropped change to Kconfig.
> * Replaced rz_dmac_type with has_icu flag.
> * Put req_no and ack_no in an anonymous struct, nested under an
>   anonymous union with mid_rid.
> * Dropped data field of_rz_dmac_match[], and added logic to determine
>   value of has_icu flag from DT parsing.
> v1->v2:
> * Switched to new macros for minimum values.
> ---
>  drivers/dma/sh/rz-dmac.c | 81 ++++++++++++++++++++++++++++++++++++----
>  1 file changed, 74 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/dma/sh/rz-dmac.c b/drivers/dma/sh/rz-dmac.c
> index d7a4ce28040b..1f687b08d6b8 100644
> --- a/drivers/dma/sh/rz-dmac.c
> +++ b/drivers/dma/sh/rz-dmac.c
> @@ -14,6 +14,7 @@
>  #include <linux/dmaengine.h>
>  #include <linux/interrupt.h>
>  #include <linux/iopoll.h>
> +#include <linux/irqchip/irq-renesas-rzv2h.h>

This does not exist for me or in the patches that was sent to me. I have
dropped this series due to build failure after picking up dmaengine
patches

drivers/dma/sh/rz-dmac.c:17:10: fatal error: linux/irqchip/irq-renesas-rzv2h.h: No such file or directory

-- 
~Vinod

  reply	other threads:[~2025-04-23 13:13 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-04-22 17:39 [PATCH v6 0/6] Add DMAC support to the RZ/V2H(P) Fabrizio Castro
2025-04-22 17:39 ` [PATCH v6 1/6] dt-bindings: dma: rz-dmac: Restrict properties for RZ/A1H Fabrizio Castro
2025-04-22 17:39 ` [PATCH v6 2/6] dt-bindings: dma: rz-dmac: Document RZ/V2H(P) family of SoCs Fabrizio Castro
2025-04-23 11:37   ` Geert Uytterhoeven
2025-04-23 13:26     ` Fabrizio Castro
2025-04-23 14:05       ` Fabrizio Castro
2025-04-23 12:13   ` Rob Herring (Arm)
2025-04-22 17:39 ` [PATCH v6 3/6] irqchip/renesas-rzv2h: Add rzv2h_icu_register_dma_req() Fabrizio Castro
2025-04-22 17:39 ` [PATCH v6 4/6] dmaengine: sh: rz-dmac: Allow for multiple DMACs Fabrizio Castro
2025-04-22 17:39 ` [PATCH v6 5/6] dmaengine: sh: rz-dmac: Add RZ/V2H(P) support Fabrizio Castro
2025-04-23 13:13   ` Vinod Koul [this message]
2025-04-23 13:46     ` Fabrizio Castro
2025-04-22 17:39 ` [PATCH v6 6/6] arm64: dts: renesas: r9a09g057: Add DMAC nodes Fabrizio Castro
2025-05-14 15:02 ` (subset) [PATCH v6 0/6] Add DMAC support to the RZ/V2H(P) Vinod Koul

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