From: Raag Jadav <raag.jadav@intel.com>
To: "Vivi, Rodrigo" <rodrigo.vivi@intel.com>
Cc: "De Marchi, Lucas" <lucas.demarchi@intel.com>,
"intel-xe@lists.freedesktop.org" <intel-xe@lists.freedesktop.org>,
"Nilawar, Badal" <badal.nilawar@intel.com>,
"Tauro, Riana" <riana.tauro@intel.com>,
"Gupta, Anshuman" <anshuman.gupta@intel.com>
Subject: Re: [PATCH v3 2/3] drm/xe: Expose PCIe Gen4 downspeed attributes
Date: Wed, 23 Apr 2025 19:41:04 +0300 [thread overview]
Message-ID: <aAkYIOSfmCY-XB3S@black.fi.intel.com> (raw)
In-Reply-To: <34b33d3135fc24302db2764ce86a641e7c49054f.camel@intel.com>
On Wed, Apr 23, 2025 at 09:25:27PM +0530, Vivi, Rodrigo wrote:
> On Wed, 2025-04-23 at 18:01 +0300, Raag Jadav wrote:
...
> > And all of this will take place when the user is doing a "firmware
> > upgrade",
> > and this can potentially open the door for "link speed downgrade" to
> > be
> > confused with "firmware rollback (downgrade) done for the link
> > speed",
> > which is not the case.
>
> well, gen4 is not a firmware, but also
>
> is gen4_downspeed == gen3 ?!
I understand it as "downgrade to" than "downgrade from".
Would you prefer gen5_downgrade instead?
> yes, naming is hard and this is why we stick with the spec names
> without re-inventing it, which only increases the confusion.
>
> >
> > > > > > 2. This information is for the end user and has to be
> > > > > > translatable enough
> > > > > > regardless of what spec says about it and the distinction
> > > > > > reduces the
> > > > > > chances of misinterpretation.
> > >
> > > when you introduce a new term that is not known, I'd say the effect
> > > is
> > > pretty much the opposite and it can be even worse if a future pcie
> > > spec
> > > starts to use that term.
> >
> > Agree, unless we're expecting users to be informed about the spec to
> > be
> > able to flash their firmwares. But if you insist, sure will _upgrade_
> > the
> > document ;)
>
> I believe you meant 'update' the document! ;)
Well, I meant to use 'downgrade' but we'll be going up a revision,
so.. :D
Raag
next prev parent reply other threads:[~2025-04-23 16:41 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-04-17 11:12 [PATCH v3 0/3] BMG PCIe Gen4 downspeed attributes and usage Raag Jadav
2025-04-17 11:12 ` [PATCH v3 1/3] drm/xe: s/xe_device_sysfs_init/xe_pm_sysfs_init Raag Jadav
2025-04-17 11:39 ` Riana Tauro
2025-04-17 11:12 ` [PATCH v3 2/3] drm/xe: Expose PCIe Gen4 downspeed attributes Raag Jadav
2025-04-23 5:25 ` Riana Tauro
2025-04-23 8:48 ` Raag Jadav
2025-04-23 9:59 ` Riana Tauro
2025-04-23 11:02 ` Raag Jadav
2025-04-23 13:35 ` Lucas De Marchi
2025-04-23 15:01 ` Raag Jadav
2025-04-23 15:26 ` Lucas De Marchi
2025-04-23 15:55 ` Vivi, Rodrigo
2025-04-23 16:41 ` Raag Jadav [this message]
2025-04-23 18:48 ` Vivi, Rodrigo
2025-04-17 11:12 ` [PATCH v3 3/3] drm/xe/doc: Wire up PCIe Gen5 update limitations Raag Jadav
2025-04-17 14:12 ` ✓ CI.Patch_applied: success for BMG PCIe Gen4 downspeed attributes and usage Patchwork
2025-04-17 14:13 ` ✓ CI.checkpatch: " Patchwork
2025-04-17 14:14 ` ✓ CI.KUnit: " Patchwork
2025-04-17 14:22 ` ✓ CI.Build: " Patchwork
2025-04-17 14:25 ` ✓ CI.Hooks: " Patchwork
2025-04-17 14:26 ` ✓ CI.checksparse: " Patchwork
2025-04-17 15:34 ` ✗ Xe.CI.BAT: failure " Patchwork
2025-04-18 8:06 ` ✗ Xe.CI.Full: " Patchwork
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