Re: [PATCH 00/21] hw/arm: add CX7200 board emulation

["Edgar E. Iglesias" <edgar.iglesias@gmail.com>]

On Thu, Apr 24, 2025 at 10:48:17AM +0000, Corvin Köhne wrote:
> On Tue, 2025-03-18 at 14:07 +0100, Corvin Köhne wrote:
> > CAUTION: External Email!!
> > From: Corvin Köhne <c.koehne@beckhoff.com>
> > 
> > Beckhoff has build a board, called CX7200, based on the Xilinx Zynq A9
> > platform. This commit series adds the Beckhoff CX7200 as new board variant to
> > QEMU.
> > 
> > The emulation is able to successfully boot an CX7200 image. The image includes
> > some self tests executed on every boot. Only the cache self test fails due to
> > QEMU emulating the cache as always being coherent. The self tests include
> > f.e.:
> > 
> > * Network
> > * Flash
> > * CCAT DMA + EEPROM [1]
> > * TwinCAT (Beckhoff's automation control software [2])
> > 
> > [1] https://github.com/beckhoff/ccat
> > [2] https://www.beckhoff.com/en-us/products/automation/
> > 
> > Corvin Köhne (1):
> >   MAINTAINERS: add myself as reviewer for Beckhoff devices
> > 
> > YannickV (20):
> >   hw/timer: Make frequency configurable
> >   hw/timer: Make PERIPHCLK period configurable
> >   hw/dma/zynq-devcfg: Handle bitstream loading via DMA to 0xffffffff
> >   hw/arm/zynq-devcfg: Prevent unintended unlock during initialization
> >   hw/dma/zynq: Notify devcfg on FPGA reset via SLCR control
> >   hw/dma/zynq-devcfg: Simulate dummy PL reset
> >   hw/dma/zynq-devcfg: Indicate power-up status of PL
> >   hw/dma/zynq-devcfg: Fix register memory
> >   hw/misc: Add dummy ZYNQ DDR controller
> >   hw/misc/zynq_slcr: Add logic for DCI configuration
> >   hw/misc: Add Beckhoff CCAT device
> >   hw/arm: Add new machine based on xilinx-zynq-a9 for Beckhoff CX7200
> >   hw/arm/beckhoff_CX7200: Remove second SD controller
> >   hw/arm/beckhoff_CX7200: Remove second GEM
> >   hw/arm/beckhoff_CX7200: Adjust Flashes and Busses
> >   hw/arm/beckhoff_CX7200: Remove usb interfaces
> >   hw/arm/beckhoff_CX7200: Remove unimplemented devices
> >   hw/arm/beckhoff_CX7200: Set CPU frequency and PERIPHCLK period
> >   hw/arm/beckhoff_CX7200: Add CCAT to CX7200
> >   hw/arm/beckhoff_CX7200: Add dummy DDR CTRL to CX7200
> > 
> >  MAINTAINERS                       |   7 +
> >  hw/arm/Kconfig                    |  18 ++
> >  hw/arm/beckhoff_CX7200.c          | 440 ++++++++++++++++++++++++++++++
> >  hw/arm/
> > https://nospamproxywebp.beckhoff.com/enQsig/link?id=BAgAAACF1PqAcgZXNGoAAACSdE
> > 7DUYKKiipqQsJl32BC_vIVe3kQ23Cr-DKSrQn5Y_I0ZnsAu8qZHVUsGVmYwKL0amQboD-LYv9rWN-
> > mvEPUf2y-CZ1qrggzKI9xgbKnOi8XSPZVd2G0Lro-8fGR9tAuNB-3CWjEaKli0                
> > |   1 +
> >  hw/dma/xlnx-zynq-devcfg.c         |  36 ++-
> >  hw/misc/Kconfig                   |   6 +
> >  hw/misc/beckhoff_ccat.c           | 365 +++++++++++++++++++++++++
> >  hw/misc/
> > https://nospamproxywebp.beckhoff.com/enQsig/link?id=BAgAAACF1PqAcgZXNGoAAACSdE
> > 7DUYKKiipqQsJl32BC_vIVe3kQ23Cr-DKSrQn5Y_I0ZnsAu8qZHVUsGVmYwKL0amQboD-LYv9rWN-
> > mvEPUf2y-CZ1qrggzKI9xgbKnOi8XSPZVd2G0Lro-8fGR9tAuNB-3CWjEaKli0               
> > |   2 +
> >  hw/misc/zynq_ddr-ctrl.c           | 331 ++++++++++++++++++++++
> >  hw/misc/zynq_slcr.c               |  47 ++++
> >  hw/timer/a9gtimer.c               |  25 +-
> >  hw/timer/arm_mptimer.c            |  33 ++-
> >  include/hw/dma/xlnx-zynq-devcfg.h |   3 +
> >  include/hw/timer/a9gtimer.h       |   2 +
> >  include/hw/timer/arm_mptimer.h    |   4 +
> >  15 files changed, 1309 insertions(+), 11 deletions(-)
> >  create mode 100644 hw/arm/beckhoff_CX7200.c
> >  create mode 100644 hw/misc/beckhoff_ccat.c
> >  create mode 100644 hw/misc/zynq_ddr-ctrl.c
> 
> Hi,
> 
> any feedback for those commits?
>

Hi Corvin,

Thanks for the reminder and sorry for the delay! I started reviewing and
sending comments today. Cool work!

It would be great if you could include a patch to docs/system/arm/
describing how to test this machine.

Cheers,
Edgar