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Fri, 09 May 2025 02:31:40 -0700 (PDT) Date: Fri, 9 May 2025 11:31:35 +0200 From: Roger Pau =?utf-8?B?TW9ubsOp?= To: Stewart Hildebrand Cc: xen-devel@lists.xenproject.org, Oleksandr Andrushchenko , Anthony PERARD , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Jiqian Chen , Mykyta Poturai Subject: Re: [PATCH v21 2/2] vpci: translate virtual PCI bus topology for guests Message-ID: References: <20250508104608.531079-1-stewart.hildebrand@amd.com> <20250508104608.531079-3-stewart.hildebrand@amd.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20250508104608.531079-3-stewart.hildebrand@amd.com> On Thu, May 08, 2025 at 06:46:07AM -0400, Stewart Hildebrand wrote: > From: Oleksandr Andrushchenko > > There are two originators for the PCI configuration space access: > 1. The domain that owns physical host bridge: MMIO handlers are > there so we can update vPCI register handlers with the values > written by the hardware domain, e.g. physical view of the registers > vs guest's view on the configuration space. > 2. Guest access to the passed through PCI devices: we need to properly > map virtual bus topology to the physical one, e.g. pass the configuration > space access to the corresponding physical devices. > > Signed-off-by: Oleksandr Andrushchenko > Signed-off-by: Volodymyr Babchuk > Signed-off-by: Stewart Hildebrand Reviewed-by: Roger Pau Monné There's the addition of the ASSERTs in vpci_mmio_{read,write}() which could do with an ARM maintainer Ack/RB. Thanks, Roger.