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Tsirkin" Subject: Re: [PATCH v3 04/19] hw/nvram/fw_cfg: Factor fw_cfg_init_mem_internal() out Message-ID: References: <20250502185652.67370-1-philmd@linaro.org> <20250502185652.67370-5-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20250502185652.67370-5-philmd@linaro.org> Received-SPF: pass client-ip=198.175.65.14; envelope-from=zhao1.liu@intel.com; helo=mgamail.intel.com X-Spam_score_int: -57 X-Spam_score: -5.8 X-Spam_bar: ----- X-Spam_report: (-5.8 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-1.414, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On Fri, May 02, 2025 at 08:56:36PM +0200, Philippe Mathieu-Daudé wrote: > Date: Fri, 2 May 2025 20:56:36 +0200 > From: Philippe Mathieu-Daudé > Subject: [PATCH v3 04/19] hw/nvram/fw_cfg: Factor > fw_cfg_init_mem_internal() out > X-Mailer: git-send-email 2.47.1 > > Factor fw_cfg_init_mem_internal() out of fw_cfg_init_mem_wide(). > In fw_cfg_init_mem_wide(), assert DMA arguments are provided. > Callers without DMA have to use the fw_cfg_init_mem() helper. > > Signed-off-by: Philippe Mathieu-Daudé > --- > hw/nvram/fw_cfg.c | 20 ++++++++++++++------ > 1 file changed, 14 insertions(+), 6 deletions(-) > > diff --git a/hw/nvram/fw_cfg.c b/hw/nvram/fw_cfg.c > index 54cfa07d3f5..d119c10d308 100644 > --- a/hw/nvram/fw_cfg.c > +++ b/hw/nvram/fw_cfg.c > @@ -1053,9 +1053,9 @@ FWCfgState *fw_cfg_init_io_dma(uint32_t iobase, uint32_t dma_iobase, > return s; > } > > -FWCfgState *fw_cfg_init_mem_wide(hwaddr ctl_addr, > - hwaddr data_addr, uint32_t data_width, > - hwaddr dma_addr, AddressSpace *dma_as) > +static FWCfgState *fw_cfg_init_mem_internal(hwaddr ctl_addr, > + hwaddr data_addr, uint32_t data_width, > + hwaddr dma_addr, AddressSpace *dma_as) > { > DeviceState *dev; > SysBusDevice *sbd; > @@ -1087,11 +1087,19 @@ FWCfgState *fw_cfg_init_mem_wide(hwaddr ctl_addr, > return s; > } > > +FWCfgState *fw_cfg_init_mem_wide(hwaddr ctl_addr, > + hwaddr data_addr, uint32_t data_width, > + hwaddr dma_addr, AddressSpace *dma_as) How about mentioning DMA in the name? fw_cfg_init_mem_dma. > +{ > + assert(dma_iobase && dma_as); > + fw_cfg_init_mem_internal(ctl_addr, data_addr, data_addr, dma_addr, dma_as); > +} > + > FWCfgState *fw_cfg_init_mem(hwaddr ctl_addr, hwaddr data_addr) OK, now I'm sure fw_cfg_init_mem() only accepts 2 arguments. :-) > { > - return fw_cfg_init_mem_wide(ctl_addr, data_addr, > - fw_cfg_data_mem_ops.valid.max_access_size, > - 0, NULL); > + return fw_cfg_init_mem_internal(ctl_addr, data_addr, > + fw_cfg_data_mem_ops.valid.max_access_size, > + 0, NULL); > } > > > -- > 2.47.1 >