From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from bmailout1.hostsharing.net (bmailout1.hostsharing.net [83.223.95.100]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CDFE210F9; Thu, 8 May 2025 07:19:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=83.223.95.100 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746688747; cv=none; b=OmUAkwZIRzh/h3C2DI4hVpy56L1LSu37chiJV2IdASgykfkdrWGEgd+e/3HzrJZ/bFByQon0J+iihGdJCP7yOwiGERfG0YbvUdTRv51Fuk0xWJIITmwraQCsELxULbogasoJy27QSkwYRtWuCVZl7VSwxzpmSM03Df++I81N23M= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746688747; c=relaxed/simple; bh=vV7dDZpmwhkm7gJmySxaMexFd/BhpWwWuGRl0GfKhe8=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=Gg7NJtzPVcK5bk3HwogNPVnpxF7jUYG+RiHOaUtISp+No/DsheJ4HfgOO4VJZmcLbbHa2HR+IELhk4/WVE9d7LKrl1XKjHM1yo5LRWMUBAYIa1F1WoHLNO8fH2HDYTWqkm/XowgQW2uF6+EerHlSZq7u9/GairhaJU9x/xtRJFQ= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=wunner.de; spf=none smtp.mailfrom=h08.hostsharing.net; arc=none smtp.client-ip=83.223.95.100 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=wunner.de Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=h08.hostsharing.net Received: from h08.hostsharing.net (h08.hostsharing.net [IPv6:2a01:37:1000::53df:5f1c:0]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "*.hostsharing.net", Issuer "RapidSSL TLS RSA CA G1" (verified OK)) by bmailout1.hostsharing.net (Postfix) with ESMTPS id 348912C00160; Thu, 8 May 2025 09:18:40 +0200 (CEST) Received: by h08.hostsharing.net (Postfix, from userid 100393) id F0654178299; Thu, 8 May 2025 09:18:55 +0200 (CEST) Date: Thu, 8 May 2025 09:18:55 +0200 From: Lukas Wunner To: Manivannan Sadhasivam Cc: Mahesh J Salgaonkar , Oliver O'Halloran , Bjorn Helgaas , Lorenzo Pieralisi , Krzysztof Wilczy??ski , Rob Herring , Zhou Wang , Will Deacon , Robert Richter , Alyssa Rosenzweig , Marc Zyngier , Conor Dooley , Daire McNamara , dingwei@marvell.com, cassel@kernel.org, Krishna Chaitanya Chundru , linuxppc-dev@lists.ozlabs.org, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-riscv@lists.infradead.org Subject: Re: [PATCH v4 2/5] PCI/ERR: Add support for resetting the slots in a platform specific way Message-ID: References: <20250508-pcie-reset-slot-v4-0-7050093e2b50@linaro.org> <20250508-pcie-reset-slot-v4-2-7050093e2b50@linaro.org> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20250508-pcie-reset-slot-v4-2-7050093e2b50@linaro.org> On Thu, May 08, 2025 at 12:40:31PM +0530, Manivannan Sadhasivam wrote: > Some host bridge devices require resetting the slots in a platform specific > way to recover them from error conditions such as Fatal AER errors, Link > Down etc... So introduce pci_host_bridge::reset_slot callback and call it > from pcibios_reset_secondary_bus() if available. > > The 'reset_slot' callback is responsible for resetting the given slot > referenced by the 'pci_dev' pointer in a platform specific way and bring it > back to the working state if possible. If any error occurs during the slot > reset operation, relevant errno should be returned. > > Signed-off-by: Manivannan Sadhasivam Reviewed-by: Lukas Wunner