From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 60C41C3ABCC for ; Tue, 13 May 2025 13:02:17 +0000 (UTC) Received: from list by lists.xenproject.org with outflank-mailman.982808.1369160 (Exim 4.92) (envelope-from ) id 1uEpGl-0004dS-Rb; Tue, 13 May 2025 13:02:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 982808.1369160; Tue, 13 May 2025 13:02:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1uEpGl-0004dL-Nk; Tue, 13 May 2025 13:02:03 +0000 Received: by outflank-mailman (input) for mailman id 982808; Tue, 13 May 2025 13:02:02 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1uEpGk-0004dD-MU for xen-devel@lists.xenproject.org; Tue, 13 May 2025 13:02:02 +0000 Received: from mail-pl1-x630.google.com (mail-pl1-x630.google.com [2607:f8b0:4864:20::630]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 7579791e-2ffa-11f0-9eb6-5ba50f476ded; Tue, 13 May 2025 15:02:01 +0200 (CEST) Received: by mail-pl1-x630.google.com with SMTP id d9443c01a7336-2301ac32320so22155955ad.1 for ; Tue, 13 May 2025 06:02:01 -0700 (PDT) Received: from localhost ([84.78.159.3]) by smtp.gmail.com with UTF8SMTPSA id d9443c01a7336-22fc82a16basm80004475ad.230.2025.05.13.06.01.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 13 May 2025 06:01:59 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 7579791e-2ffa-11f0-9eb6-5ba50f476ded DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=citrix.com; s=google; t=1747141320; x=1747746120; darn=lists.xenproject.org; h=in-reply-to:content-transfer-encoding:content-disposition :mime-version:references:message-id:subject:cc:to:from:date:from:to :cc:subject:date:message-id:reply-to; bh=lc3BOQgtPalWPQo2SYdws3VVJyyUIiwl4Eaj0tViT5k=; b=NEGL4X5QuqN8cPvUZImTa4K75/WYkXKQlstTnO0s5y4OZQ4jCbRfVjW5FMSTfPONZX HYttMI5bSW50Hblr+QS41jfsxf0JduD/KWNqZW+j/U3geX0feNXfXV8kRgsTjwHRjURR mcOYde72e8Vjgp9GW85P6dVprQz1gOSC1wzJs= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1747141320; x=1747746120; h=in-reply-to:content-transfer-encoding:content-disposition :mime-version:references:message-id:subject:cc:to:from:date :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=lc3BOQgtPalWPQo2SYdws3VVJyyUIiwl4Eaj0tViT5k=; b=YnVcc1ljT7b3GVfm16jdsGoRaPHQwfhQbgtPqWKSmvz4lYcFkxnP8E7Othiewtb+H5 fhbslq46q67XYDWblvTVbu2QpEcDK4aKgmI0bPdGdwU0m2oELhRbmO3kkYIZaNulYZAJ WuowbhJLWxp3c9QOvplStZYq3+7+xrPAnzYYQLqVaiX5A3Mxxdmx+cpZ1dG6qnXS+I/l B1jFNJsR4ER2TvcexX0wkSopGQ3E441Qqa1Z1VSfiWFin4zQgIEknVvcv9yr25M4ulkg 2ZhNOgdMcMWkwrO57jrHgS6amuHz4kEwNPR8ptxcerqnY4rPGB2ViRsv9VY1SYLKOI6Z TVzg== X-Gm-Message-State: AOJu0YwAPHxE0MqFhLLUgJ6rjFRmMUJ5KURh3OY/UyY4JG+wu8GJYcgg J0cxyBqZAUAiboTFv2JwSQciUws207DEg+1AhvBDM2CpI/ehNGp02Q9T3m/Q9ZU= X-Gm-Gg: ASbGncuBMYoLZyQW/GrLhHiDxkG8vgeBUSBeFRx1U+0qYfxmMP0zvOJbg74FmZraIhp fZEog69szTuA5AqbL060Sodx11O+OWVB3MvrA1PBYzwEqbg0cRoYpFDS2EPazthOJfjgLGKQHCM ZZWWCwvQoU0MsMkWrEhMLJ0mqK5STYQ2AcNSQ6jzA1LNGDVEy/KqBQpaccgQgPaMNwrb0ZRFoBi qL2XaUTS+OVouPK1jZi1N1/Rlbyw1dbjpu0NqBw90RSERX5YGeh5/yhro7Nt4tOIAH5hMymRsCI FgxTG5Qt2TYzmdeD1+RZUlAC81LXblj6ju6oPNOqoQ9lji+IyL5C8/1fqpyBrA== X-Google-Smtp-Source: AGHT+IHgAhPx5do4QHswfjkdmFRUXRGa5Si/o37pZLP+q8VQckuelOUeZwBMJn2v5Hr8IQu/tHvMQg== X-Received: by 2002:a17:902:ce12:b0:223:3396:15e8 with SMTP id d9443c01a7336-22fc8b6cbd0mr303518315ad.22.1747141320055; Tue, 13 May 2025 06:02:00 -0700 (PDT) Date: Tue, 13 May 2025 15:01:54 +0200 From: Roger Pau =?utf-8?B?TW9ubsOp?= To: Jan Beulich Cc: "xen-devel@lists.xenproject.org" , Andrew Cooper , Wei Liu Subject: Re: [PATCH v2 1/6] x86: support cache-writeback in flush_area_local() et al Message-ID: References: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: On Wed, May 03, 2023 at 11:44:39AM +0200, Jan Beulich wrote: > The majority of the present callers really aren't after invalidating > cache contents, but only after writeback. Make this available by simply > extending the FLUSH_CACHE handling accordingly. No feature checks are > required here: cache_writeback() falls back to cache_flush() as > necessary, while WBNOINVD degenerates to WBINVD on older hardware. > > Signed-off-by: Jan Beulich Reviewed-by: Roger Pau MonnĂ© > --- > v2: FLUSH_WRITEBACK -> FLUSH_CACHE_WRITEBACK. > > --- a/xen/arch/x86/flushtlb.c > +++ b/xen/arch/x86/flushtlb.c > @@ -232,7 +232,7 @@ unsigned int flush_area_local(const void > if ( flags & FLUSH_HVM_ASID_CORE ) > hvm_flush_guest_tlbs(); > > - if ( flags & FLUSH_CACHE ) > + if ( flags & (FLUSH_CACHE | FLUSH_CACHE_WRITEBACK) ) > { > const struct cpuinfo_x86 *c = ¤t_cpu_data; > unsigned long sz = 0; > @@ -245,13 +245,16 @@ unsigned int flush_area_local(const void > c->x86_clflush_size && c->x86_cache_size && sz && > ((sz >> 10) < c->x86_cache_size) ) > { > - cache_flush(va, sz); > - flags &= ~FLUSH_CACHE; > + if ( flags & FLUSH_CACHE ) > + cache_flush(va, sz); > + else > + cache_writeback(va, sz); > + flags &= ~(FLUSH_CACHE | FLUSH_CACHE_WRITEBACK); > } > - else > - { > + else if ( flags & FLUSH_CACHE ) > wbinvd(); > - } > + else > + wbnoinvd(); > } > > if ( flags & FLUSH_ROOT_PGTBL ) > --- a/xen/arch/x86/include/asm/flushtlb.h > +++ b/xen/arch/x86/include/asm/flushtlb.h > @@ -135,6 +135,8 @@ void switch_cr3_cr4(unsigned long cr3, u > #else > # define FLUSH_NO_ASSIST 0 > #endif > + /* Write back data cache contents */ > +#define FLUSH_CACHE_WRITEBACK 0x10000 > > /* Flush local TLBs/caches. */ > unsigned int flush_area_local(const void *va, unsigned int flags); > @@ -194,7 +196,11 @@ static inline int clean_and_invalidate_d > } > static inline int clean_dcache_va_range(const void *p, unsigned long size) > { > - return clean_and_invalidate_dcache_va_range(p, size); > + unsigned int order = get_order_from_bytes(size); > + > + /* sub-page granularity support needs to be added if necessary */ > + flush_area_local(p, FLUSH_CACHE_WRITEBACK | FLUSH_ORDER(order)); > + return 0; > } I'm planning to get rid of the clean_dcache_va_range() helper on x86, but I don't want to force you to rebase on top of that. Thanks, Roger.