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From: "Roger Pau Monné" <roger.pau@citrix.com>
To: Jan Beulich <jbeulich@suse.com>
Cc: "xen-devel@lists.xenproject.org" <xen-devel@lists.xenproject.org>,
	Andrew Cooper <andrew.cooper3@citrix.com>
Subject: Re: [PATCH v2 6/6] x86/HVM: limit cache writeback overhead
Date: Wed, 14 May 2025 17:12:22 +0200	[thread overview]
Message-ID: <aCSy1sSjZ6MiHOIT@macbook.lan> (raw)
In-Reply-To: <be7e2d91-69f5-4168-9d2c-57d3f6dac26f@suse.com>

On Wed, May 14, 2025 at 03:20:56PM +0200, Jan Beulich wrote:
> On 14.05.2025 15:00, Roger Pau Monné wrote:
> > On Wed, May 03, 2023 at 11:47:18AM +0200, Jan Beulich wrote:
> >> There's no need to write back caches on all CPUs upon seeing a WBINVD
> >> exit; ones that a vCPU hasn't run on since the last writeback (or since
> >> it was started) can't hold data which may need writing back.
> > 
> > Couldn't you do the same with PV mode, and hence put the cpumask in
> > arch_vcpu rather than hvm_vcpu?
> 
> We could in principle, but there's no use of flush_all() there right now
> (i.e. nothing to "win").

Yes, that will get "fixed" if we take patch 2 from my series.  That
fixes the lack of broadcasting of wb{,no}invd when emulating it for
PV domains.

I think this patch would be better after my fix to cache_op(), and
then the uncertainty around patch 2 makes it unclear whether we want
this.

> >> Signed-off-by: Jan Beulich <jbeulich@suse.com>
> >> ---
> >> With us not running AMD IOMMUs in non-coherent ways, I wonder whether
> >> svm_wbinvd_intercept() really needs to do anything (or whether it
> >> couldn't check iommu_snoop just like VMX does, knowing that as of
> >> c609108b2190 ["x86/shadow: make iommu_snoop usage consistent with
> >> HAP's"] that's always set; this would largely serve as grep fodder then,
> >> to make sure this code is updated once / when we do away with this
> >> global variable, and it would be the penultimate step to being able to
> >> fold SVM's and VT-x'es functions).
> > 
> > On my series I expand cache_flush_permitted() to also account for
> > iommu_snoop, I think it's easier to have a single check that signals
> > whether cache control is allowed for a domain, rather that having to
> > check multiple different conditions.
> 
> Right, adjustments here would want making (in whichever series goes in
> later).
> 
> For both of the responses: I think with patch 1 of this series having
> gone in and with in particular Andrew's concern over patch 2 (which
> may extend to patch 3), it may make sense for your series to go next.
> I shall then re-base, while considering what to do with patches 2 and 3
> (they may need dropping in the end).

Makes sense, I still need to get over your feedback on my series, I've
been distracted with other stuff.

Thanks, Roger.


  reply	other threads:[~2025-05-14 15:12 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-05-03  9:43 [PATCH v2 0/6] x86: reduce cache flushing overhead Jan Beulich
2023-05-03  9:44 ` [PATCH v2 1/6] x86: support cache-writeback in flush_area_local() et al Jan Beulich
2025-05-13 13:01   ` Roger Pau Monné
2023-05-03  9:45 ` [PATCH v2 2/6] x86/HVM: restrict guest-induced WBINVD to cache writeback Jan Beulich
2025-05-13 13:12   ` Andrew Cooper
2025-05-13 13:24     ` Jan Beulich
2025-05-13 13:41   ` Roger Pau Monné
2025-05-13 13:54     ` Jan Beulich
2025-05-14 11:30       ` Roger Pau Monné
2025-05-14 12:46         ` Jan Beulich
2025-05-14 14:42           ` Roger Pau Monné
2025-05-14 14:53             ` Jan Beulich
2023-05-03  9:45 ` [PATCH v2 3/6] x86/PV: restrict guest-induced WBINVD (or alike) " Jan Beulich
2023-05-03  9:46 ` [PATCH v2 4/6] VT-d: restrict iommu_flush_all() " Jan Beulich
2025-05-14 11:40   ` Roger Pau Monné
2025-05-14 12:49     ` Jan Beulich
2025-05-14 14:44   ` Roger Pau Monné
2025-05-14 14:57     ` Jan Beulich
2023-05-03  9:46 ` [PATCH v2 5/6] x86: FLUSH_CACHE -> FLUSH_CACHE_EVICT Jan Beulich
2025-05-14 11:44   ` Roger Pau Monné
2025-05-14 12:52     ` Jan Beulich
2025-05-14 14:45       ` Roger Pau Monné
2025-05-15  6:46         ` Jan Beulich
2023-05-03  9:47 ` [PATCH v2 6/6] x86/HVM: limit cache writeback overhead Jan Beulich
2025-05-14 13:00   ` Roger Pau Monné
2025-05-14 13:20     ` Jan Beulich
2025-05-14 15:12       ` Roger Pau Monné [this message]
2025-05-15  6:47         ` Jan Beulich
2025-05-15  8:09           ` Roger Pau Monné

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