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From: Alexander Wilhelm <alexander.wilhelm@westermo.com>
To: Loic Poulain <loic.poulain@oss.qualcomm.com>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>,
	mhi@lists.linux.dev, linux-arm-msm@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH] bus: mhi: host: fix endianness of BHI vector table
Date: Thu, 15 May 2025 11:46:52 +0200	[thread overview]
Message-ID: <aCW4DCR/IMxejUpg@FUE-ALEWI-WINX> (raw)
In-Reply-To: <CAFEp6-3-25sRUvPbeX0oH1pVyRt49gvdVw5eMi1_azzPdYUjDw@mail.gmail.com>

Am Thu, May 15, 2025 at 11:38:43AM +0200 schrieb Loic Poulain:
> On Thu, May 15, 2025 at 11:26 AM Alexander Wilhelm
> <alexander.wilhelm@westermo.com> wrote:
> >
> > On big endian platforms like PowerPC the DMA address and size are required
> > to be swapped. Otherwise the MHI bus does not start properly. The following
> > example shows the error messages by using qcn9274 wireless radio module
> > with ath12k driver:
> >
> >     ath12k_pci 0001:01:00.0: BAR 0: assigned [mem 0xc00000000-0xc001fffff 64bit]
> >     ath12k_pci 0001:01:00.0: MSI vectors: 1
> >     ath12k_pci 0001:01:00.0: Hardware name: qcn9274 hw2.0
> >     ath12k_pci 0001:01:00.0: failed to set mhi state: POWER_ON(2)
> >     ath12k_pci 0001:01:00.0: failed to start mhi: -110
> >     ath12k_pci 0001:01:00.0: failed to power up :-110
> >     ath12k_pci 0001:01:00.0: failed to create soc core: -110
> >     ath12k_pci 0001:01:00.0: failed to init core: -110
> >     ath12k_pci: probe of 0001:01:00.0 failed with error -110
> >
> > Signed-off-by: Alexander Wilhelm <alexander.wilhelm@westermo.com>
> > ---
> >  drivers/bus/mhi/host/boot.c | 8 ++++----
> >  1 file changed, 4 insertions(+), 4 deletions(-)
> >
> > diff --git a/drivers/bus/mhi/host/boot.c b/drivers/bus/mhi/host/boot.c
> > index efa3b6dddf4d..205d83ac069f 100644
> > --- a/drivers/bus/mhi/host/boot.c
> > +++ b/drivers/bus/mhi/host/boot.c
> > @@ -31,8 +31,8 @@ int mhi_rddm_prepare(struct mhi_controller *mhi_cntrl,
> >         int ret;
> >
> >         for (i = 0; i < img_info->entries - 1; i++, mhi_buf++, bhi_vec++) {
> > -               bhi_vec->dma_addr = mhi_buf->dma_addr;
> > -               bhi_vec->size = mhi_buf->len;
> > +               bhi_vec->dma_addr = cpu_to_le64(mhi_buf->dma_addr);
> > +               bhi_vec->size = cpu_to_le64(mhi_buf->len);
> 
> Ok, but then I think the bhi_vec_entry struct should be fixed as well,
> using __le64 fields.
> 
> Regards,
> Loic

Sure, I'll fix that. Thank you.

Best regards
Alexander Wilhelm

  reply	other threads:[~2025-05-15  9:47 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-05-15  9:25 [PATCH] bus: mhi: host: fix endianness of BHI vector table Alexander Wilhelm
2025-05-15  9:38 ` Loic Poulain
2025-05-15  9:46   ` Alexander Wilhelm [this message]
  -- strict thread matches above, loose matches on Subject: below --
2025-05-15  9:31 Alexander Wilhelm

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