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Fri, 16 May 2025 06:49:24 +0000 (GMT) X-AuditID: b6c32a29-566fe7000000223e-da-6826dff4953d Received: from epsmtip1.samsung.com ( [182.195.34.30]) by epsmgms1p1new.samsung.com (Symantec Messaging Gateway) with SMTP id 60.14.08766.4FFD6286; Fri, 16 May 2025 15:49:24 +0900 (KST) Received: from perf (unknown [10.229.95.91]) by epsmtip1.samsung.com (KnoxPortal) with ESMTPA id 20250516064924epsmtip146597e4c87a451500848ddb378884dc4~-7y6ktU0k1210412104epsmtip1K; Fri, 16 May 2025 06:49:24 +0000 (GMT) Date: Fri, 16 May 2025 15:53:58 +0900 From: Youngmin Nam To: Mark Rutland , Marc Zyngier , Daniel Lezcano , Thomas Gleixner Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, junhosj.choi@samsung.com, hajun.sung@samsung.com, joonki.min@samsung.com, d7271.choe@samsung.com, jkkkkk.choi@samsung.com, jt1217.kim@samsung.com, qperret@google.com, willdeacon@google.com, dhyun.cha@samsung.com, kn_hong.choi@samsung.com, mankyum.kim@samsung.com Subject: [QUESTION] arch_counter_register() restricts CNTPT access when booted in EL1, even if EL2 is supported Message-ID: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFupjkeLIzCtJLcpLzFFi42LZdlhJTvfLfbUMg6/fuC2u7Z3IbjHvs6zF 6wu/mSya9l9itjh/cDq7xdXd75gtJkzew27xu6mZ1WLC+82MFpseX2O1uLxrDpvFtWtP2S2W Xr/IZLFzzklWizObtrFYbN40ldmi/edrFgdBjzXz1jB6LNhU6rFpVSebx51re9g83p07x+6x eUm9R9+WVYwenzfJBXBEcdmkpOZklqUW6dslcGXcP3uHsWCXUMXkAyvZGhh/8XUxcnJICJhI XN95hb2LkYtDSGA3o8S6J3/ZIBIyErdXXmaFsIUl7rccYYUous8ocWDKayCHg4NFQFXi0i5z kBo2AV2JbSf+MYLYIgJzGCW6FpmA2MwCN5gkjk0oBbGFBQol1s9aygxi8wooS3yZ1wRlC0qc nPmEBaJeXeLPvEvMIOOZBaQllv/jgAjLSzRvnc08gZF/FpKOWUg6ZiF0zELSsYCRZRWjZGpB cW56brFhgWFearlecWJucWleul5yfu4mRnCUaWnuYNy+6oPeIUYmDsZDjBIczEoivNezlDOE eFMSK6tSi/Lji0pzUosPMUpzsCiJ84q/6E0REkhPLEnNTk0tSC2CyTJxcEo1MMnkzvu3Tdrw 47+nt09mh8a0fRN99M0noKdzlcG6FIdriimCdvlWZewX61/NLAvtKmRS8fKfc6TjU8m5JRJH HhlcSUnnblhl9GerjG/W9Mei/u48ndulGAOP3oyQSfr5M02WIf5k0Pkb7OJl+7oCYkMfqwWc eNlzrmjn5Adyydf+MX4P2Pw14KiRj2SjlslT24285UsuabRl8/aICG0RXbZ4c3UOt9Rs3zs1 L8Sd1zBX3p25TGhOyqKcHd1LHrNJOxkzvmu1erhOzeUWC2uqo2y2oZk62+moZ1mzrBZnn3Po 8ev/JCEedKHml2ZNb9LtDp60f6lvyqtNV/900u1yeaPH/Crp2Y05F/NnVj9TYinOSDTUYi4q TgQAMVcUdCEDAAA= X-CMS-MailID: 20250516064924epcas2p24c8f3dc1860768b2b7bed30a41528770 X-Msg-Generator: CA Content-Type: multipart/mixed; boundary="----.cKlolkxedMLVDWcgmrm8Gdt3k.eYqjXC2h.qDwGQioKViW9=_56d50_" X-Sendblock-Type: AUTO_CONFIDENTIAL CMS-TYPE: 102P cpgsPolicy: CPGSC10-234,Y X-CFilter-Loop: Reflected X-CMS-RootMailID: 20250516064924epcas2p24c8f3dc1860768b2b7bed30a41528770 References: ------.cKlolkxedMLVDWcgmrm8Gdt3k.eYqjXC2h.qDwGQioKViW9=_56d50_ Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit Content-Disposition: inline Hi arm arch timer experts, While reviewing the arm_arch_timer code in Linux 6.12, I noticed that the function arch_counter_register() restricts the use of the physical counter (cntpct_el0) on systems where the kernel is running in EL1, even if EL2 is supported and cntpct_el0 is accessible. In our case: - We are not using pKVM. - The kernel is booted in EL1. - We disabled VIRT_PPI and explicitly selected PHYS_NONSECURE_PPI for the timer refering to below code. static enum arch_timer_ppi_nr __init arch_timer_select_ppi(void) { if (is_kernel_in_hyp_mode()) return ARCH_TIMER_HYP_PPI; if (!is_hyp_mode_available() && arch_timer_ppi[ARCH_TIMER_VIRT_PPI]) return ARCH_TIMER_VIRT_PPI; if (IS_ENABLED(CONFIG_ARM64)) return ARCH_TIMER_PHYS_NONSECURE_PPI; return ARCH_TIMER_PHYS_SECURE_PPI; } Despite this, the `arch_counter_register()` logic selects `cntvct_el0` unconditionally due to the `!is_hyp_mode_available()` condition. static void __init arch_counter_register(unsigned type) { u64 (*scr)(void); u64 start_count; int width; /* Register the CP15 based counter if we have one */ if (type & ARCH_TIMER_TYPE_CP15) { u64 (*rd)(void); if ((IS_ENABLED(CONFIG_ARM64) && !is_hyp_mode_available()) || arch_timer_uses_ppi == ARCH_TIMER_VIRT_PPI) { if (arch_timer_counter_has_wa()) { rd = arch_counter_get_cntvct_stable; scr = raw_counter_get_cntvct_stable; } else { rd = arch_counter_get_cntvct; scr = arch_counter_get_cntvct; } } else { if (arch_timer_counter_has_wa()) { rd = arch_counter_get_cntpct_stable; scr = raw_counter_get_cntpct_stable; } else { rd = arch_counter_get_cntpct; scr = arch_counter_get_cntpct; } } As I understand it, `is_hyp_mode_available()` checks whether the kernel booted into EL2 — not whether EL2 is *supported* by the hardware. Therefore, even on systems where EL2 exists and `cntpct_el0` is accessible from EL1, the kernel still forces the use of `cntvct_el0` if the boot EL is EL1. Is this restriction to `cntvct_el0` in EL1 an architectural requirement, or simply a conservative default to avoid possible traps on some systems? If the hardware clearly supports EL2 and allows CNTPT access from EL1, could this restriction be relaxed? Any guidance would be appreciated. ------.cKlolkxedMLVDWcgmrm8Gdt3k.eYqjXC2h.qDwGQioKViW9=_56d50_ Content-Type: text/plain; charset="utf-8" ------.cKlolkxedMLVDWcgmrm8Gdt3k.eYqjXC2h.qDwGQioKViW9=_56d50_--