From: Gabriel Paubert <paubert@iram.es>
To: Herbert Xu <herbert@gondor.apana.org.au>
Cc: kernel test robot <lkp@intel.com>,
oe-kbuild-all@lists.linux.dev,
Linux Crypto Mailing List <linux-crypto@vger.kernel.org>,
Venkat Rao Bagalkote <venkat88@linux.ibm.com>,
Madhavan Srinivasan <maddy@linux.ibm.com>,
Stephen Rothwell <sfr@canb.auug.org.au>,
Danny Tsen <dtsen@linux.ibm.com>,
linuxppc-dev@lists.ozlabs.org,
Michael Ellerman <mpe@ellerman.id.au>
Subject: Re: [PATCH] powerpc: Add gcc 128-bit shift helpers
Date: Fri, 16 May 2025 13:06:54 +0200 [thread overview]
Message-ID: <aCccToR_71ETmPd-@lt-gp.iram.es> (raw)
In-Reply-To: <aCb7WW2gRrtEmgqD@gondor.apana.org.au>
On Fri, May 16, 2025 at 04:46:17PM +0800, Herbert Xu wrote:
> On Thu, May 15, 2025 at 08:06:09PM +0800, kernel test robot wrote:
> > tree: https://urldefense.com/v3/__https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git__;!!D9dNQwwGXtA!TSuOAutxjuD3Hp-RC0Fw9dTNuagdCKeNLTN71tv_OmhUxyAPLfIfwwpZop5pKFXgS4Jfkt830_tEMkbHT4vfog$ master
> > head: 484803582c77061b470ac64a634f25f89715be3f
> > commit: c66d7ebbe2fa14e41913adb421090a7426f59786 [10914/11408] crypto: powerpc/poly1305 - Add SIMD fallback
> > config: powerpc64-randconfig-002-20250515 (https://urldefense.com/v3/__https://download.01.org/0day-ci/archive/20250515/202505152053.FrKekjCe-lkp@intel.com/config__;!!D9dNQwwGXtA!TSuOAutxjuD3Hp-RC0Fw9dTNuagdCKeNLTN71tv_OmhUxyAPLfIfwwpZop5pKFXgS4Jfkt830_tEMkaPDLMaoA$ )
> > compiler: powerpc64-linux-gcc (GCC) 8.5.0
> > reproduce (this is a W=1 build): (https://urldefense.com/v3/__https://download.01.org/0day-ci/archive/20250515/202505152053.FrKekjCe-lkp@intel.com/reproduce__;!!D9dNQwwGXtA!TSuOAutxjuD3Hp-RC0Fw9dTNuagdCKeNLTN71tv_OmhUxyAPLfIfwwpZop5pKFXgS4Jfkt830_tEMkbNYWK3LQ$ )
>
> Thanks for the report. This patch should fix the problem.
It won't work for big endian, nor for 32 bit obviously.
Besides that, in arch/power/kernel/misc_32.S, you'll find a branchless
version of these functions. It's for 64 bit shifts on 32 bit big-endian
but it can easily be adapted to 128 bit shifts on 64 bit processors
(swapping r3 and r4 depending on endianness).
Several functions of kernel/misc_32.S should arguably be moved to lib/.
Cheers,
Gabriel
>
> ---8<---
> When optimising for size, gcc generates out-of-line calls for 128-bit
> integer shifts. Add these functions to avoid build errors.
>
> Fixes: c66d7ebbe2fa ("crypto: powerpc/poly1305 - Add SIMD fallback")
> Reported-by: kernel test robot <lkp@intel.com>
> Closes: https://urldefense.com/v3/__https://lore.kernel.org/oe-kbuild-all/202505152053.FrKekjCe-lkp@intel.com/__;!!D9dNQwwGXtA!TSuOAutxjuD3Hp-RC0Fw9dTNuagdCKeNLTN71tv_OmhUxyAPLfIfwwpZop5pKFXgS4Jfkt830_tEMkbo7rsvYg$
> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
>
> diff --git a/arch/powerpc/lib/Makefile b/arch/powerpc/lib/Makefile
> index 1cd74673cbf7..a41c071c1652 100644
> --- a/arch/powerpc/lib/Makefile
> +++ b/arch/powerpc/lib/Makefile
> @@ -87,3 +87,5 @@ obj-$(CONFIG_CRC_T10DIF_ARCH) += crc-t10dif-powerpc.o
> crc-t10dif-powerpc-y := crc-t10dif-glue.o crct10dif-vpmsum_asm.o
>
> obj-$(CONFIG_PPC64) += $(obj64-y)
> +
> +obj-$(CONFIG_ARCH_SUPPORTS_INT128) += tishift.o
> diff --git a/arch/powerpc/lib/tishift.S b/arch/powerpc/lib/tishift.S
> new file mode 100644
> index 000000000000..79afef2d8d54
> --- /dev/null
> +++ b/arch/powerpc/lib/tishift.S
> @@ -0,0 +1,54 @@
> +/* SPDX-License-Identifier: GPL-2.0-or-later */
> +/*
> + * Copyright (c) 2025 Herbert Xu <herbert@gondor.apana.org.au>
> + */
> +#include <asm/ppc_asm.h>
> +#include <linux/export.h>
> +
> +_GLOBAL(__lshrti3)
> + cmplwi r5,63
> + ble 1f
> + addi r5,r5,-64
> + srd r3,r4,r5
> + li r4,0
> + blr
> +1:
> + subfic r7,r5,64
> + srd r3,r3,r5
> + sld r6,r4,r7
> + srd r4,r4,r5
> + or r3,r3,r6
> + blr
> +EXPORT_SYMBOL(__lshrti3)
> +
> +_GLOBAL(__ashrti3)
> + cmplwi r5,63
> + ble 1f
> + addi r5,r5,-64
> + srad r3,r4,r5
> + sradi r4,r4,63
> + blr
> +1:
> + subfic r7,r5,64
> + srd r3,r3,r5
> + sld r6,r4,r7
> + srad r4,r4,r5
> + or r3,r3,r6
> + blr
> +EXPORT_SYMBOL(__ashrti3)
> +
> +_GLOBAL(__ashlti3)
> + cmplwi r5,63
> + ble 1f
> + addi r5,r5,-64
> + sld r4,r3,r5
> + li r3,0
> + blr
> +1:
> + subfic r7,r5,64
> + sld r4,r4,r5
> + srd r6,r3,r7
> + sld r3,r3,r5
> + or r4,r4,r6
> + blr
> +EXPORT_SYMBOL(__ashlti3)
> --
> Email: Herbert Xu <herbert@gondor.apana.org.au>
> Home Page: https://urldefense.com/v3/__http://gondor.apana.org.au/*herbert/__;fg!!D9dNQwwGXtA!TSuOAutxjuD3Hp-RC0Fw9dTNuagdCKeNLTN71tv_OmhUxyAPLfIfwwpZop5pKFXgS4Jfkt830_tEMkbwt6bO1g$
> PGP Key: https://urldefense.com/v3/__http://gondor.apana.org.au/*herbert/pubkey.txt__;fg!!D9dNQwwGXtA!TSuOAutxjuD3Hp-RC0Fw9dTNuagdCKeNLTN71tv_OmhUxyAPLfIfwwpZop5pKFXgS4Jfkt830_tEMkam0aoZDQ$
>
next prev parent reply other threads:[~2025-05-16 11:55 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-05-15 12:06 [linux-next:master 10914/11408] fair.c:undefined reference to `__lshrti3' kernel test robot
2025-05-16 8:46 ` [PATCH] powerpc: Add gcc 128-bit shift helpers Herbert Xu
2025-05-16 11:06 ` Gabriel Paubert [this message]
2025-05-17 1:50 ` [v2 PATCH] " Herbert Xu
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