From: Shawn Guo <shawnguo2@yeah.net>
To: Laurentiu Mihalcea <laurentiumihalcea111@gmail.com>
Cc: Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Shawn Guo <shawnguo@kernel.org>,
Sascha Hauer <s.hauer@pengutronix.de>,
Fabio Estevam <festevam@gmail.com>,
Daniel Baluta <daniel.baluta@nxp.com>,
Shengjiu Wang <shengjiu.wang@nxp.com>,
Frank Li <Frank.li@nxp.com>,
Marco Felsch <m.felsch@pengutronix.de>,
Marc Kleine-Budde <mkl@pengutronix.de>,
Alexander Stein <alexander.stein@ew.tq-group.com>,
Pengutronix Kernel Team <kernel@pengutronix.de>,
devicetree@vger.kernel.org, imx@lists.linux.dev,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v6 3/6] bus: add driver for IMX AIPSTZ bridge
Date: Mon, 2 Jun 2025 11:26:00 +0800 [thread overview]
Message-ID: <aD0ZyPam+q3akJLx@dragon> (raw)
In-Reply-To: <20250415171919.5623-4-laurentiumihalcea111@gmail.com>
On Tue, Apr 15, 2025 at 01:19:16PM -0400, Laurentiu Mihalcea wrote:
> From: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
>
> The secure AHB to IP Slave (AIPSTZ) bus bridge provides access control
> configurations meant to restrict access to certain peripherals.
> Some of the configurations include:
>
> 1) Marking masters as trusted for R/W. Based on this
> (and the configuration of the accessed peripheral), the bridge
> may choose to abort the R/W transactions issued by certain
> masters.
>
> 2) Allowing/disallowing write accesses to peripherals.
>
> Add driver for this IP. Since there's currently no framework for
> access controllers (and since there's currently no need for having
> flexibility w.r.t the configurations) all this driver does is it
> applies a relaxed, "default" configuration, in which all masters
> are trusted for R/W.
>
> Note that some instances of this IP (e.g: AIPSTZ5 on i.MX8MP) may be tied
> to a power domain and may lose their configuration when the domain is
> powered off. This is why the configuration has to be restored when the
> domain is powered on.
>
> Co-developed-by: Daniel Baluta <daniel.baluta@nxp.com>
> Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
> Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
> ---
> drivers/bus/Kconfig | 6 +++
> drivers/bus/Makefile | 1 +
> drivers/bus/imx-aipstz.c | 92 ++++++++++++++++++++++++++++++++++++++++
> 3 files changed, 99 insertions(+)
> create mode 100644 drivers/bus/imx-aipstz.c
>
> diff --git a/drivers/bus/Kconfig b/drivers/bus/Kconfig
> index ff669a8ccad9..fe7600283e70 100644
> --- a/drivers/bus/Kconfig
> +++ b/drivers/bus/Kconfig
> @@ -87,6 +87,12 @@ config HISILICON_LPC
> Driver to enable I/O access to devices attached to the Low Pin
> Count bus on the HiSilicon Hip06/7 SoC.
>
> +config IMX_AIPSTZ
> + tristate "Support for IMX Secure AHB to IP Slave bus (AIPSTZ) bridge"
> + depends on ARCH_MXC
> + help
> + Enable support for IMX AIPSTZ bridge.
> +
> config IMX_WEIM
> bool "Freescale EIM DRIVER"
> depends on ARCH_MXC || COMPILE_TEST
> diff --git a/drivers/bus/Makefile b/drivers/bus/Makefile
> index cddd4984d6af..8e693fe8a03a 100644
> --- a/drivers/bus/Makefile
> +++ b/drivers/bus/Makefile
> @@ -15,6 +15,7 @@ obj-$(CONFIG_FSL_MC_BUS) += fsl-mc/
>
> obj-$(CONFIG_BT1_APB) += bt1-apb.o
> obj-$(CONFIG_BT1_AXI) += bt1-axi.o
> +obj-$(CONFIG_IMX_AIPSTZ) += imx-aipstz.o
> obj-$(CONFIG_IMX_WEIM) += imx-weim.o
> obj-$(CONFIG_INTEL_IXP4XX_EB) += intel-ixp4xx-eb.o
> obj-$(CONFIG_MIPS_CDMM) += mips_cdmm.o
> diff --git a/drivers/bus/imx-aipstz.c b/drivers/bus/imx-aipstz.c
> new file mode 100644
> index 000000000000..44db40dae71b
> --- /dev/null
> +++ b/drivers/bus/imx-aipstz.c
> @@ -0,0 +1,92 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Copyright 2025 NXP
> + */
> +
> +#include <linux/module.h>
> +#include <linux/of.h>
> +#include <linux/of_platform.h>
> +#include <linux/platform_device.h>
> +#include <linux/pm_runtime.h>
> +#include <linux/regmap.h>
> +
> +#define IMX_AIPSTZ_MPR0 0x0
> +
> +struct imx_aipstz_config {
> + u32 mpr0;
> +};
Would it be more future-proof to have something like this?
struct imx_aipstz_priv {
__iomem *base;
const struct imx_aipstz_config *default_cfg;
};
With imx_aipstz_priv being drvdata, it could be easily scaled to have
more data later if needed.
Shawn
> +
> +static void imx_aipstz_apply_default(void __iomem *base,
> + const struct imx_aipstz_config *default_cfg)
> +{
> + writel(default_cfg->mpr0, base + IMX_AIPSTZ_MPR0);
> +}
> +
> +static int imx_aipstz_probe(struct platform_device *pdev)
> +{
> + const struct imx_aipstz_config *default_cfg;
> + void __iomem *base;
> +
> + base = devm_platform_get_and_ioremap_resource(pdev, 0, NULL);
> + if (IS_ERR(base))
> + return dev_err_probe(&pdev->dev, -ENOMEM,
> + "failed to get/ioremap AC memory\n");
> +
> + default_cfg = of_device_get_match_data(&pdev->dev);
> +
> + imx_aipstz_apply_default(base, default_cfg);
> +
> + dev_set_drvdata(&pdev->dev, base);
> +
> + pm_runtime_set_active(&pdev->dev);
> + devm_pm_runtime_enable(&pdev->dev);
> +
> + return devm_of_platform_populate(&pdev->dev);
> +}
> +
> +static int imx_aipstz_runtime_resume(struct device *dev)
> +{
> + const struct imx_aipstz_config *default_cfg;
> + void __iomem *base;
> +
> + base = dev_get_drvdata(dev);
> + default_cfg = of_device_get_match_data(dev);
> +
> + /* restore potentially lost configuration during domain power-off */
> + imx_aipstz_apply_default(base, default_cfg);
> +
> + return 0;
> +}
> +
> +static const struct dev_pm_ops imx_aipstz_pm_ops = {
> + RUNTIME_PM_OPS(NULL, imx_aipstz_runtime_resume, NULL)
> + SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, pm_runtime_force_resume)
> +};
> +
> +/*
> + * following configuration is equivalent to:
> + * masters 0-7 => trusted for R/W + use AHB's HPROT[1] to det. privilege
> + */
> +static const struct imx_aipstz_config imx8mp_aipstz_default_cfg = {
> + .mpr0 = 0x77777777,
> +};
> +
> +static const struct of_device_id imx_aipstz_of_ids[] = {
> + { .compatible = "fsl,imx8mp-aipstz", .data = &imx8mp_aipstz_default_cfg },
> + { }
> +};
> +MODULE_DEVICE_TABLE(of, imx_aipstz_of_ids);
> +
> +static struct platform_driver imx_aipstz_of_driver = {
> + .probe = imx_aipstz_probe,
> + .driver = {
> + .name = "imx-aipstz",
> + .of_match_table = imx_aipstz_of_ids,
> + .pm = pm_ptr(&imx_aipstz_pm_ops),
> + },
> +};
> +module_platform_driver(imx_aipstz_of_driver);
> +
> +MODULE_LICENSE("GPL");
> +MODULE_DESCRIPTION("IMX secure AHB to IP Slave bus (AIPSTZ) bridge driver");
> +MODULE_AUTHOR("Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>");
> --
> 2.34.1
>
next prev parent reply other threads:[~2025-06-02 3:37 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-04-15 17:19 [PATCH v6 0/6] imx8mp: add support for the IMX AIPSTZ bridge Laurentiu Mihalcea
2025-04-15 17:19 ` [PATCH v6 1/6] dt-bindings: bus: document " Laurentiu Mihalcea
2025-04-15 17:19 ` [PATCH v6 2/6] dt-bindings: dsp: fsl,dsp: document 'access-controllers' property Laurentiu Mihalcea
2025-04-15 17:19 ` [PATCH v6 3/6] bus: add driver for IMX AIPSTZ bridge Laurentiu Mihalcea
2025-06-02 3:26 ` Shawn Guo [this message]
2025-06-02 4:09 ` Shawn Guo
2025-06-05 10:22 ` Peng Fan
2025-06-10 16:07 ` Laurentiu Mihalcea
2025-04-15 17:19 ` [PATCH v6 4/6] arm64: dts: imx8mp: convert 'aips5' to 'aipstz5' Laurentiu Mihalcea
2025-04-15 17:19 ` [PATCH v6 5/6] arm64: dts: imx8mp: add aipstz-related definitions Laurentiu Mihalcea
2025-06-02 4:11 ` Shawn Guo
2025-04-15 17:19 ` [PATCH v6 6/6] arm64: dts: imx8mp: make 'dsp' node depend on 'aips5' Laurentiu Mihalcea
2025-05-26 11:09 ` [PATCH v6 0/6] imx8mp: add support for the IMX AIPSTZ bridge Daniel Baluta
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