From: Leo Liang <ycliang@andestech.com>
To: Eoin Dickson <Eoin.Dickson@microchip.com>
Cc: <u-boot@lists.denx.de>, <rick@andestech.com>,
<conor.dooley@microchip.com>, <jamie.gibbons@microchip.com>,
<praveen.kumar@microchip.com>, <cyril.jean@microchip.com>,
<jagan@amarulasolutions.com>
Subject: Re: [PATCH v2 2/2] spi: coreqspi: add xfer function for PolarFire SoC
Date: Mon, 2 Jun 2025 17:45:16 +0800 [thread overview]
Message-ID: <aD1yrMJLrOSlmbMH@swlinux02> (raw)
In-Reply-To: <20250529102112.3544972-3-Eoin.Dickson@microchip.com>
On Thu, May 29, 2025 at 03:51:12PM +0530, Eoin Dickson wrote:
> [EXTERNAL MAIL]
>
> From: Eoin Dickson <eoin.dickson@microchip.com>
>
> Add xfer function to PolarFire SoC coreqspi driver. The read and write
> operations are limited to one byte at a time instead of four as CMD18
> (multiple block read) reads garbage when four byte ops are enabled.
>
> Signed-off-by: Eoin Dickson <eoin.dickson@microchip.com>
> ---
> drivers/spi/microchip_coreqspi.c | 113 ++++++++++++++++++++++++++++++-
> 1 file changed, 111 insertions(+), 2 deletions(-)
Acked-by: Leo Yu-Chi Liang <ycliang@andestech.com>
prev parent reply other threads:[~2025-06-02 9:45 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-05-29 10:21 [PATCH v2 0/2] Add SD card support to the Beagle-V-Fire Eoin Dickson
2025-05-29 10:21 ` [PATCH v2 1/2] gpio: add PolarFire SoC GPIO and Core GPIO driver Eoin Dickson
2025-06-02 9:44 ` Leo Liang
2025-05-29 10:21 ` [PATCH v2 2/2] spi: coreqspi: add xfer function for PolarFire SoC Eoin Dickson
2025-06-02 9:45 ` Leo Liang [this message]
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