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From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To: Anup Patel <apatel@ventanamicro.com>
Cc: "Michael Turquette" <mturquette@baylibre.com>,
	"Stephen Boyd" <sboyd@kernel.org>,
	"Rob Herring" <robh@kernel.org>,
	"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
	"Conor Dooley" <conor+dt@kernel.org>,
	"Jassi Brar" <jassisinghbrar@gmail.com>,
	"Thomas Gleixner" <tglx@linutronix.de>,
	"Rafael J . Wysocki" <rafael@kernel.org>,
	"Mika Westerberg" <mika.westerberg@linux.intel.com>,
	"Linus Walleij" <linus.walleij@linaro.org>,
	"Bartosz Golaszewski" <brgl@bgdev.pl>,
	"Uwe Kleine-König" <ukleinek@kernel.org>,
	"Palmer Dabbelt" <palmer@dabbelt.com>,
	"Paul Walmsley" <paul.walmsley@sifive.com>,
	"Len Brown" <lenb@kernel.org>,
	"Sunil V L" <sunilvl@ventanamicro.com>,
	"Rahul Pathak" <rpathak@ventanamicro.com>,
	"Leyfoon Tan" <leyfoon.tan@starfivetech.com>,
	"Atish Patra" <atish.patra@linux.dev>,
	"Andrew Jones" <ajones@ventanamicro.com>,
	"Samuel Holland" <samuel.holland@sifive.com>,
	"Anup Patel" <anup@brainfault.org>,
	linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
	linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v4 17/23] ACPI: RISC-V: Create interrupt controller list in sorted order
Date: Wed, 28 May 2025 14:05:36 +0300	[thread overview]
Message-ID: <aDbuABrlO30TIrx1@smile.fi.intel.com> (raw)
In-Reply-To: <20250525084710.1665648-18-apatel@ventanamicro.com>

On Sun, May 25, 2025 at 02:17:04PM +0530, Anup Patel wrote:
> 
> Currently, the interrupt controller list is created without any order.
> Create the list sorted with the GSI base of the interrupt controllers.

...

> -	list_add_tail(&ext_intc_element->list, &ext_intc_list);
> +	if (list_empty(&ext_intc_list)) {
> +		list_add(&ext_intc_element->list, &ext_intc_list);
> +		return 0;
> +	}

With the below done the above can be optimized (hopefully).

> +	list_for_each_entry(node, &ext_intc_list, list) {
> +		if (node->gsi_base < ext_intc_element->gsi_base)
> +			break;
> +	}
> +
> +	__list_add(&ext_intc_element->list, node->list.prev, &node->list);

Is this reimplementation of list_add_tail()? And why list debug is excluded here?

-- 
With Best Regards,
Andy Shevchenko



WARNING: multiple messages have this Message-ID (diff)
From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To: Anup Patel <apatel@ventanamicro.com>
Cc: "Jassi Brar" <jassisinghbrar@gmail.com>,
	"Atish Patra" <atish.patra@linux.dev>,
	"Michael Turquette" <mturquette@baylibre.com>,
	"Uwe Kleine-König" <ukleinek@kernel.org>,
	linux-riscv@lists.infradead.org, linux-clk@vger.kernel.org,
	"Rob Herring" <robh@kernel.org>,
	"Anup Patel" <anup@brainfault.org>,
	"Bartosz Golaszewski" <brgl@bgdev.pl>,
	"Rafael J . Wysocki" <rafael@kernel.org>,
	"Linus Walleij" <linus.walleij@linaro.org>,
	"Andrew Jones" <ajones@ventanamicro.com>,
	devicetree@vger.kernel.org, "Conor Dooley" <conor+dt@kernel.org>,
	"Leyfoon Tan" <leyfoon.tan@starfivetech.com>,
	"Paul Walmsley" <paul.walmsley@sifive.com>,
	"Thomas Gleixner" <tglx@linutronix.de>,
	"Mika Westerberg" <mika.westerberg@linux.intel.com>,
	"Stephen Boyd" <sboyd@kernel.org>,
	linux-kernel@vger.kernel.org,
	"Samuel Holland" <samuel.holland@sifive.com>,
	"Palmer Dabbelt" <palmer@dabbelt.com>,
	"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
	"Rahul Pathak" <rpathak@ventanamicro.com>,
	"Len Brown" <lenb@kernel.org>
Subject: Re: [PATCH v4 17/23] ACPI: RISC-V: Create interrupt controller list in sorted order
Date: Wed, 28 May 2025 14:05:36 +0300	[thread overview]
Message-ID: <aDbuABrlO30TIrx1@smile.fi.intel.com> (raw)
In-Reply-To: <20250525084710.1665648-18-apatel@ventanamicro.com>

On Sun, May 25, 2025 at 02:17:04PM +0530, Anup Patel wrote:
> 
> Currently, the interrupt controller list is created without any order.
> Create the list sorted with the GSI base of the interrupt controllers.

...

> -	list_add_tail(&ext_intc_element->list, &ext_intc_list);
> +	if (list_empty(&ext_intc_list)) {
> +		list_add(&ext_intc_element->list, &ext_intc_list);
> +		return 0;
> +	}

With the below done the above can be optimized (hopefully).

> +	list_for_each_entry(node, &ext_intc_list, list) {
> +		if (node->gsi_base < ext_intc_element->gsi_base)
> +			break;
> +	}
> +
> +	__list_add(&ext_intc_element->list, node->list.prev, &node->list);

Is this reimplementation of list_add_tail()? And why list debug is excluded here?

-- 
With Best Regards,
Andy Shevchenko



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linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

  reply	other threads:[~2025-05-28 11:05 UTC|newest]

Thread overview: 108+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-05-25  8:46 [PATCH v4 00/23] Linux SBI MPXY and RPMI drivers Anup Patel
2025-05-25  8:46 ` Anup Patel
2025-05-25  8:46 ` [PATCH v4 01/23] riscv: Add new error codes defined by SBI v3.0 Anup Patel
2025-05-25  8:46   ` Anup Patel
2025-06-06 23:51   ` Atish Patra
2025-06-06 23:51     ` Atish Patra
2025-06-09  5:58     ` Anup Patel
2025-06-09  5:58       ` Anup Patel
2025-05-25  8:46 ` [PATCH v4 02/23] dt-bindings: mailbox: Add bindings for RPMI shared memory transport Anup Patel
2025-05-25  8:46   ` Anup Patel
2025-05-25  8:46 ` [PATCH v4 03/23] dt-bindings: mailbox: Add bindings for RISC-V SBI MPXY extension Anup Patel
2025-05-25  8:46   ` Anup Patel
2025-05-25  8:46 ` [PATCH v4 04/23] RISC-V: Add defines for the SBI message proxy extension Anup Patel
2025-05-25  8:46   ` Anup Patel
2025-05-27  8:47   ` Andy Shevchenko
2025-05-27  8:47     ` Andy Shevchenko
2025-06-09  6:12     ` Anup Patel
2025-06-09  6:12       ` Anup Patel
2025-05-25  8:46 ` [PATCH v4 05/23] mailbox: Add common header for RPMI messages sent via mailbox Anup Patel
2025-05-25  8:46   ` Anup Patel
2025-05-27 11:16   ` Andy Shevchenko
2025-05-27 11:16     ` Andy Shevchenko
2025-06-09  8:48     ` Anup Patel
2025-06-09  8:48       ` Anup Patel
2025-05-25  8:46 ` [PATCH v4 06/23] mailbox: Allow controller specific mapping using fwnode Anup Patel
2025-05-25  8:46   ` Anup Patel
2025-05-27 11:41   ` Andy Shevchenko
2025-05-27 11:41     ` Andy Shevchenko
2025-06-09  9:10     ` Anup Patel
2025-06-09  9:10       ` Anup Patel
2025-06-09 19:53       ` Andy Shevchenko
2025-06-09 19:53         ` Andy Shevchenko
2025-05-25  8:46 ` [PATCH v4 07/23] mailbox: Add RISC-V SBI message proxy (MPXY) based mailbox driver Anup Patel
2025-05-25  8:46   ` Anup Patel
2025-05-28 10:52   ` Andy Shevchenko
2025-05-28 10:52     ` Andy Shevchenko
2025-06-09 12:29     ` Anup Patel
2025-06-09 12:29       ` Anup Patel
2025-06-09 20:04       ` Andy Shevchenko
2025-06-09 20:04         ` Andy Shevchenko
2025-06-10  4:35         ` Anup Patel
2025-06-10  4:35           ` Anup Patel
2025-06-10  9:55           ` Andy Shevchenko
2025-06-10  9:55             ` Andy Shevchenko
2025-06-11  5:21             ` Anup Patel
2025-06-11  5:21               ` Anup Patel
2025-06-11  8:23               ` Andy Shevchenko
2025-06-11  8:23                 ` Andy Shevchenko
2025-05-25  8:46 ` [PATCH v4 08/23] dt-bindings: clock: Add RPMI clock service message proxy bindings Anup Patel
2025-05-25  8:46   ` Anup Patel
2025-05-30 16:28   ` Conor Dooley
2025-05-30 16:28     ` Conor Dooley
2025-06-10  5:00     ` Anup Patel
2025-06-10  5:00       ` Anup Patel
2025-05-25  8:46 ` [PATCH v4 09/23] dt-bindings: clock: Add RPMI clock service controller bindings Anup Patel
2025-05-25  8:46   ` Anup Patel
2025-05-30 16:41   ` Conor Dooley
2025-05-30 16:41     ` Conor Dooley
2025-06-10  5:20     ` Anup Patel
2025-06-10  5:20       ` Anup Patel
2025-05-25  8:46 ` [PATCH v4 10/23] clk: Add clock driver for the RISC-V RPMI clock service group Anup Patel
2025-05-25  8:46   ` Anup Patel
2025-05-25  8:46 ` [PATCH v4 11/23] dt-bindings: Add RPMI system MSI message proxy bindings Anup Patel
2025-05-25  8:46   ` Anup Patel
2025-06-06 22:59   ` Atish Patra
2025-06-06 22:59     ` Atish Patra
2025-06-10  6:09     ` Anup Patel
2025-06-10  6:09       ` Anup Patel
2025-05-25  8:46 ` [PATCH v4 12/23] dt-bindings: Add RPMI system MSI interrupt controller bindings Anup Patel
2025-05-25  8:46   ` Anup Patel
2025-06-06 23:03   ` Atish Patra
2025-06-06 23:03     ` Atish Patra
2025-06-10  6:22     ` Anup Patel
2025-06-10  6:22       ` Anup Patel
2025-05-25  8:47 ` [PATCH v4 13/23] irqchip: Add driver for the RPMI system MSI service group Anup Patel
2025-05-25  8:47   ` Anup Patel
2025-05-27 11:33   ` Andy Shevchenko
2025-05-27 11:33     ` Andy Shevchenko
2025-06-10 11:03     ` Anup Patel
2025-06-10 11:03       ` Anup Patel
2025-06-11  8:22       ` Andy Shevchenko
2025-06-11  8:22         ` Andy Shevchenko
2025-05-25  8:47 ` [PATCH v4 14/23] ACPI: property: Refactor acpi_fwnode_get_reference_args() Anup Patel
2025-05-25  8:47   ` Anup Patel
2025-05-25  8:47 ` [PATCH v4 15/23] ACPI: property: Add support for cells property Anup Patel
2025-05-25  8:47   ` Anup Patel
2025-05-25  8:47 ` [PATCH v4 16/23] ACPI: scan: Update honor list for RPMI System MSI Anup Patel
2025-05-25  8:47   ` Anup Patel
2025-05-25  8:47 ` [PATCH v4 17/23] ACPI: RISC-V: Create interrupt controller list in sorted order Anup Patel
2025-05-25  8:47   ` Anup Patel
2025-05-28 11:05   ` Andy Shevchenko [this message]
2025-05-28 11:05     ` Andy Shevchenko
2025-06-10  4:42     ` Sunil V L
2025-06-10  4:42       ` Sunil V L
2025-06-11  8:21       ` Andy Shevchenko
2025-06-11  8:21         ` Andy Shevchenko
2025-05-25  8:47 ` [PATCH v4 18/23] ACPI: RISC-V: Add support to update gsi range Anup Patel
2025-05-25  8:47   ` Anup Patel
2025-05-25  8:47 ` [PATCH v4 19/23] ACPI: RISC-V: Add RPMI System MSI to GSI mapping Anup Patel
2025-05-25  8:47   ` Anup Patel
2025-05-25  8:47 ` [PATCH v4 20/23] mailbox/riscv-sbi-mpxy: Add ACPI support Anup Patel
2025-05-25  8:47   ` Anup Patel
2025-05-25  8:47 ` [PATCH v4 21/23] irqchip/riscv-rpmi-sysmsi: " Anup Patel
2025-05-25  8:47   ` Anup Patel
2025-05-25  8:47 ` [PATCH v4 22/23] RISC-V: Enable GPIO keyboard and event device in RV64 defconfig Anup Patel
2025-05-25  8:47   ` Anup Patel
2025-05-25  8:47 ` [PATCH v4 23/23] MAINTAINERS: Add entry for RISC-V RPMI and MPXY drivers Anup Patel
2025-05-25  8:47   ` Anup Patel

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