From: Oliver Upton <oliver.upton@linux.dev>
To: Colton Lewis <coltonlewis@google.com>
Cc: kvm@vger.kernel.org, pbonzini@redhat.com, corbet@lwn.net,
linux@armlinux.org.uk, catalin.marinas@arm.com, will@kernel.org,
maz@kernel.org, joey.gouly@arm.com, suzuki.poulose@arm.com,
yuzenghui@huawei.com, mark.rutland@arm.com, shuah@kernel.org,
linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev,
linux-perf-users@vger.kernel.org,
linux-kselftest@vger.kernel.org
Subject: Re: [PATCH 06/17] KVM: arm64: Introduce method to partition the PMU
Date: Wed, 4 Jun 2025 13:57:49 -0700 [thread overview]
Message-ID: <aECzTYoj1F6WHAUC@linux.dev> (raw)
In-Reply-To: <gsntsekf1d58.fsf@coltonlewis-kvm.c.googlers.com>
On Wed, Jun 04, 2025 at 08:10:27PM +0000, Colton Lewis wrote:
> Thank you Oliver for the additional explanation.
>
> Oliver Upton <oliver.upton@linux.dev> writes:
>
> > On Tue, Jun 03, 2025 at 09:32:41PM +0000, Colton Lewis wrote:
> > > Oliver Upton <oliver.upton@linux.dev> writes:
>
> > > > On Mon, Jun 02, 2025 at 07:26:51PM +0000, Colton Lewis wrote:
> > > > > static void kvm_arm_setup_mdcr_el2(struct kvm_vcpu *vcpu)
> > > > > {
> > > > > + u8 hpmn = vcpu->kvm->arch.arm_pmu->hpmn;
> > > > > +
> > > > > preempt_disable();
>
> > > > > /*
> > > > > * This also clears MDCR_EL2_E2PB_MASK and MDCR_EL2_E2TB_MASK
> > > > > * to disable guest access to the profiling and trace buffers
> > > > > */
> > > > > - vcpu->arch.mdcr_el2 = FIELD_PREP(MDCR_EL2_HPMN,
> > > > > - *host_data_ptr(nr_event_counters));
> > > > > - vcpu->arch.mdcr_el2 |= (MDCR_EL2_TPM |
> > > > > + vcpu->arch.mdcr_el2 = FIELD_PREP(MDCR_EL2_HPMN, hpmn);
> > > > > + vcpu->arch.mdcr_el2 |= (MDCR_EL2_HPMD |
> > > > > + MDCR_EL2_TPM |
>
> > > > This isn't safe, as there's no guarantee that kvm_arch::arm_pmu is
> > > > pointing that the PMU for this CPU. KVM needs to derive HPMN from some
> > > > per-CPU state, not anything tied to the VM/vCPU.
>
> > > I'm confused. Isn't this function preparing to run the vCPU on this
> > > CPU? Why would it be pointing at a different PMU?
>
> > Because arm64 is a silly ecosystem and system designers can glue
> > together heterogenous CPU implementations. The arm_pmu that KVM is
> > pointing at might only match a subset of CPUs, but vCPUs migrate at the
> > whim of the scheduler (and userspace).
>
> That means the arm_pmu field might at any time point to data that
> doesn't represent the current CPU. I'm surprised that's not swapped out
> anywhere. Seems like it would be useful to have an arch struct be a
> reliable source of information about the current arch.
There's no way to accomplish that. It is per-VM data, and you could have
vCPUs on a mix of physical CPUs.
This is mitigated somewhat when the VMM explicitly selects a PMU
implementation, as we prevent vCPUs from actually entering the guest on
an unsupported CPU (see ON_SUPPORTED_CPU flag).
> > There are two *very* distinct functions w.r.t. partitioning:
>
> > 1) Partitioning of a particular arm_pmu that says how many counters the
> > host can use
>
> > 2) VMM intentions to present a subset of the KVM-owned counter
> > partition to its guest
>
> > #1 is modifying *global* state, we really can't mess with that in the
> > context of a single VM...
>
> I see the distinction more clearly now. Since KVM can only control the
> number of counters presented to the guest through HPMN, why would the
> VMM ever choose a subset? If the host PMU is globally partitioned to not
> use anything in the guest range, presenting fewer counters to a guest is
> just leaving some counters in the middle of the range unused.
You may not want to give a 'full' PMU to all VMs running on a system,
but some OSes (Windows) expect to have at least the fixed CPU cycle
counter present. In this case the VMM would deliberately expose fewer
counters. FEAT_HPMN0 didn't get added to the architecture by accident...
Thanks,
Oliver
next prev parent reply other threads:[~2025-06-04 20:58 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-02 19:26 [PATCH 00/17] ARM64 PMU Partitioning Colton Lewis
2025-06-02 19:26 ` [PATCH 01/17] arm64: cpufeature: Add cpucap for HPMN0 Colton Lewis
2025-06-02 22:15 ` Oliver Upton
2025-06-03 20:50 ` Colton Lewis
2025-06-02 19:26 ` [PATCH 02/17] arm64: Generate sign macro for sysreg Enums Colton Lewis
2025-06-02 19:26 ` [PATCH 03/17] arm64: cpufeature: Add cpucap for PMICNTR Colton Lewis
2025-06-02 19:26 ` [PATCH 04/17] KVM: arm64: Cleanup PMU includes Colton Lewis
2025-06-02 21:42 ` Sean Christopherson
2025-06-03 20:48 ` Colton Lewis
2025-06-02 19:26 ` [PATCH 05/17] KVM: arm64: Reorganize PMU functions Colton Lewis
2025-06-02 19:26 ` [PATCH 06/17] KVM: arm64: Introduce method to partition the PMU Colton Lewis
2025-06-02 22:28 ` Oliver Upton
2025-06-03 21:32 ` Colton Lewis
2025-06-03 22:02 ` Oliver Upton
2025-06-04 20:10 ` Colton Lewis
2025-06-04 20:57 ` Oliver Upton [this message]
2025-06-02 19:26 ` [PATCH 07/17] perf: arm_pmuv3: Generalize counter bitmasks Colton Lewis
2025-06-02 19:26 ` [PATCH 08/17] perf: arm_pmuv3: Keep out of guest counter partition Colton Lewis
2025-06-02 19:26 ` [PATCH 09/17] KVM: arm64: Set up FGT for Partitioned PMU Colton Lewis
2025-06-02 19:26 ` [PATCH 10/17] KVM: arm64: Writethrough trapped PMEVTYPER register Colton Lewis
2025-06-03 22:22 ` Oliver Upton
2025-06-04 20:10 ` Colton Lewis
2025-06-02 19:26 ` [PATCH 11/17] KVM: arm64: Use physical PMSELR for PMXEVTYPER if partitioned Colton Lewis
2025-06-02 19:26 ` [PATCH 12/17] KVM: arm64: Writethrough trapped PMOVS register Colton Lewis
2025-06-02 19:26 ` [PATCH 13/17] KVM: arm64: Context switch Partitioned PMU guest registers Colton Lewis
2025-06-02 19:26 ` [PATCH 14/17] perf: pmuv3: Handle IRQs for Partitioned PMU guest counters Colton Lewis
2025-06-02 19:27 ` [PATCH 15/17] KVM: arm64: Inject recorded guest interrupts Colton Lewis
2025-06-02 19:27 ` [PATCH 16/17] KVM: arm64: Add ioctl to partition the PMU when supported Colton Lewis
2025-06-02 22:40 ` Oliver Upton
2025-06-03 21:46 ` Colton Lewis
2025-06-04 20:12 ` Colton Lewis
2025-06-02 19:27 ` [PATCH 17/17] KVM: arm64: selftests: Add test case for partitioned PMU Colton Lewis
2025-06-03 22:43 ` [PATCH 00/17] ARM64 PMU Partitioning Oliver Upton
2025-06-04 20:10 ` Colton Lewis
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