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CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:CYYPR11MB8430.namprd11.prod.outlook.com; PTR:; CAT:NONE; SFS:(13230040)(366016)(1800799024)(376014); DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?JK3zBC60B/hkKM4g6QZUFRMbB1sRWkSav0sKlaWyusEORcNcMDTHkvGB0CCC?= =?us-ascii?Q?unY/xYvSpnYKvsxeC8DOq8+qmOnpxZjOni9CH/l3vN1UoU/2NvOpVSaLD3kk?= =?us-ascii?Q?nGZE5LQ+aIgH0PV1p/+stvdqWv9FCWjqajQxxp4tvXZaRRMGETxkUf9X8b/9?= =?us-ascii?Q?F9HT+f1WOw/Lbd5OrqYaoRqpOf2IOglyIvpLmpROewTK1DHh71CNRC4rPlqB?= =?us-ascii?Q?t+6E69bBlkIesEopwZsT8Fk6a1UB2h7wIpuI+2TIVG6htOIvTpI+e/2SvNZk?= =?us-ascii?Q?+7TCDaG3Rl+QHbEaaIaolBqQf2a8B3myByRYwtX4dwrNycfNgOiw3IMgar2F?= =?us-ascii?Q?bfaV14eq7+6+ZzVHgZ6O+VLmJQlllVhAFb2IiIdntJ19bSnVatfJMcZ5vI1y?= =?us-ascii?Q?hfdN9S/PHMMtsnAqNvUOzpnG1ltbEz50q4PgxzbRoSEePnvxDssPyExb9u4D?= =?us-ascii?Q?zpI01tv1drMiM0iNkW0WYU2hSh9UXtRS+BjmpLqCYAAWzSiriYUYS2yAbbUV?= =?us-ascii?Q?nN7X4GQrV8YIpaP+ySrE29OLbVCs2CuYAGGj8E2/NsMgSeZOxFWpS2HUnt8j?= =?us-ascii?Q?u+kJJjJ0g/41KXuv1ui+P019DRKm9bOnz41mIZU4gJ/c6m9E2m5ocNQs76hI?= =?us-ascii?Q?iNa6Mq21EnbeHLqa7towWIwsWoOKjGWaclHFyR1QQ+OwV+D6ga2xFlXIG5m0?= =?us-ascii?Q?gh9boKJNEAWFtkAcMPN415VUtg/unlq8BNrS2mKsLd1V6QYkmVIyvfZoqEF4?= =?us-ascii?Q?eUAjRNa+1LlDvGWUK8AJK2lyeSuc9SIHKqFwYeLL6heQgvZKCRGZy/gdU7NI?= =?us-ascii?Q?SX/XwjCWpxv8YMD2jZP39azdCxqdlMeA7iSPL+idPLzFPlUae/xeAWLm3a6/?= =?us-ascii?Q?2xdMLQYPWDTR4oGqwokSkuL/cV1hHZeo4ujcuGM2Kbj2chAq1zB2RayVy78o?= =?us-ascii?Q?GOOL7HlX0lAypQPzdEUNjWbAqC5qpCLG57dcixxNWslvvplxFPaZ6PgRBSRA?= =?us-ascii?Q?283iYNIk89Cdk8I0OEpoVJgj6gJSu+IAiC7sUyYtBcrkKF1TzfcFzmIhNATr?= =?us-ascii?Q?klPK7REv6/gk8mtQgx25ncliqVtZ0TDolKtvE554j+MFQOuinwzjg5ckzR4k?= =?us-ascii?Q?m1J0o1T3iWN31duM9MjeqEoeaU8UCx/FblP4yZwwT1U46cdvJYhnKaV7PWmL?= =?us-ascii?Q?TMEFP5jmuRDV1BCO/u6TfOgXjM/1m3pwpeO8ZN5m8Q2b0acHRLBpSkbqWDs1?= =?us-ascii?Q?TTYECCgnLtWay/4T5S/LF+IMbjLIVZOpOhivsXziKMhIO2E9Kz+rCPhbwYHD?= =?us-ascii?Q?fOKleruFaYKHzKM1e9beGteViG28Vb0Ij0kmnyNyzKD0cvK2yWxNlLUoEx0+?= =?us-ascii?Q?mlO/p0Zxm9JYBxCK0tuiBJouj3JSCIy4u4uTpqg+1c3T/pbuZHb4ZWs/GBlq?= =?us-ascii?Q?HkXHgXJwGafEErZUFs5fs7XODS8/fKbAMAc2F33vzqA2cAnedVp7krYltW2B?= =?us-ascii?Q?Ltb5EagTgDEXgmjSO8lIgK/5X1kbTabYFZ1W41fTGirZn0FA+shFwIodmlGU?= =?us-ascii?Q?rTl7c9G5vpA2MMrL4LRhIkFo98MtuccXcIqCJ/sPAvcUKyyEfZga4ozKctWF?= =?us-ascii?Q?9g=3D=3D?= X-MS-Exchange-CrossTenant-Network-Message-Id: 3951cfdd-2e84-4aa0-8c9f-08ddad173327 X-MS-Exchange-CrossTenant-AuthSource: CYYPR11MB8430.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 16 Jun 2025 20:48:51.2793 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: 0oeoe2KFYQjNxgOoozkD7E2Kap15ifv2VTuYwmmPfB27B8YbSN3DVV/zoQ7y5hJXeDnhY+btdMt7C7H19MDGPA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH3PR11MB8591 X-OriginatorOrg: intel.com X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On Thu, Jun 05, 2025 at 01:29:33PM +0300, Jani Nikula wrote: > Only use the ms granularity wait in snb_pcode_write_timeout(), primarily > to better align with the xe driver, which also only has the millisecond > wait. > > Use an arbitrary 250 us fast wait before the specified ms wait, and have > snb_pcode_write() default to 1 ms. > > This means snb_pcode_write() and snb_pcode_write_timeout() will always > be sleeping functions. There should not be any atomic users for pcode > writes though, and any display code using pcode via xe has already been > non-atomic. The uncore wait will do a might_sleep() annotation that > should catch any problems. Reviewed-by: Rodrigo Vivi > > Signed-off-by: Jani Nikula > --- > drivers/gpu/drm/i915/display/intel_cdclk.c | 5 ++--- > drivers/gpu/drm/i915/display/intel_display_power_well.c | 3 +-- > drivers/gpu/drm/i915/intel_pcode.c | 5 ++--- > drivers/gpu/drm/i915/intel_pcode.h | 5 ++--- > drivers/gpu/drm/xe/compat-i915-headers/intel_pcode.h | 6 ++---- > 5 files changed, 9 insertions(+), 15 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c > index f0c673e40ce5..7ad506da7d3d 100644 > --- a/drivers/gpu/drm/i915/display/intel_cdclk.c > +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c > @@ -2147,7 +2147,7 @@ static void bxt_set_cdclk(struct intel_display *display, > */ > ret = snb_pcode_write_timeout(&dev_priv->uncore, > HSW_PCODE_DE_WRITE_FREQ_REQ, > - 0x80000000, 150, 2); > + 0x80000000, 2); > > if (ret) { > drm_err(display->drm, > @@ -2187,8 +2187,7 @@ static void bxt_set_cdclk(struct intel_display *display, > */ > ret = snb_pcode_write_timeout(&dev_priv->uncore, > HSW_PCODE_DE_WRITE_FREQ_REQ, > - cdclk_config->voltage_level, > - 150, 2); > + cdclk_config->voltage_level, 2); > } > if (ret) { > drm_err(display->drm, > diff --git a/drivers/gpu/drm/i915/display/intel_display_power_well.c b/drivers/gpu/drm/i915/display/intel_display_power_well.c > index 02e3c22be21e..e60f60ddbff7 100644 > --- a/drivers/gpu/drm/i915/display/intel_display_power_well.c > +++ b/drivers/gpu/drm/i915/display/intel_display_power_well.c > @@ -485,8 +485,7 @@ static void icl_tc_cold_exit(struct intel_display *display) > int ret, tries = 0; > > while (1) { > - ret = snb_pcode_write_timeout(&i915->uncore, ICL_PCODE_EXIT_TCCOLD, 0, > - 250, 1); > + ret = snb_pcode_write(&i915->uncore, ICL_PCODE_EXIT_TCCOLD, 0); > if (ret != -EAGAIN || ++tries == 3) > break; > msleep(1); > diff --git a/drivers/gpu/drm/i915/intel_pcode.c b/drivers/gpu/drm/i915/intel_pcode.c > index 3db2ba439bb5..b7e9b4ee1425 100644 > --- a/drivers/gpu/drm/i915/intel_pcode.c > +++ b/drivers/gpu/drm/i915/intel_pcode.c > @@ -110,13 +110,12 @@ int snb_pcode_read(struct intel_uncore *uncore, u32 mbox, u32 *val, u32 *val1) > } > > int snb_pcode_write_timeout(struct intel_uncore *uncore, u32 mbox, u32 val, > - int fast_timeout_us, int slow_timeout_ms) > + int timeout_ms) > { > int err; > > mutex_lock(&uncore->i915->sb_lock); > - err = __snb_pcode_rw(uncore, mbox, &val, NULL, > - fast_timeout_us, slow_timeout_ms, false); > + err = __snb_pcode_rw(uncore, mbox, &val, NULL, 250, timeout_ms, false); > mutex_unlock(&uncore->i915->sb_lock); > > if (err) { > diff --git a/drivers/gpu/drm/i915/intel_pcode.h b/drivers/gpu/drm/i915/intel_pcode.h > index 8d2198e29422..401ce27f72d4 100644 > --- a/drivers/gpu/drm/i915/intel_pcode.h > +++ b/drivers/gpu/drm/i915/intel_pcode.h > @@ -11,10 +11,9 @@ > struct intel_uncore; > > int snb_pcode_read(struct intel_uncore *uncore, u32 mbox, u32 *val, u32 *val1); > -int snb_pcode_write_timeout(struct intel_uncore *uncore, u32 mbox, u32 val, > - int fast_timeout_us, int slow_timeout_ms); > +int snb_pcode_write_timeout(struct intel_uncore *uncore, u32 mbox, u32 val, int timeout_ms); > #define snb_pcode_write(uncore, mbox, val) \ > - snb_pcode_write_timeout(uncore, mbox, val, 500, 0) > + snb_pcode_write_timeout((uncore), (mbox), (val), 1) > > int skl_pcode_request(struct intel_uncore *uncore, u32 mbox, u32 request, > u32 reply_mask, u32 reply, int timeout_base_ms); > diff --git a/drivers/gpu/drm/xe/compat-i915-headers/intel_pcode.h b/drivers/gpu/drm/xe/compat-i915-headers/intel_pcode.h > index a473aa6697d0..32da708680c2 100644 > --- a/drivers/gpu/drm/xe/compat-i915-headers/intel_pcode.h > +++ b/drivers/gpu/drm/xe/compat-i915-headers/intel_pcode.h > @@ -10,11 +10,9 @@ > #include "xe_pcode.h" > > static inline int > -snb_pcode_write_timeout(struct intel_uncore *uncore, u32 mbox, u32 val, > - int fast_timeout_us, int slow_timeout_ms) > +snb_pcode_write_timeout(struct intel_uncore *uncore, u32 mbox, u32 val, int timeout_ms) > { > - return xe_pcode_write_timeout(__compat_uncore_to_tile(uncore), mbox, val, > - slow_timeout_ms ?: 1); > + return xe_pcode_write_timeout(__compat_uncore_to_tile(uncore), mbox, val, timeout_ms); > } > > static inline int > -- > 2.39.5 >