Re: [PATCH 0/2] Memory and PCI definitions for emulated ATS

[Peter Xu <peterx@redhat.com>]

On Fri, Jun 20, 2025 at 05:56:49AM +0000, CLEMENT MATHIEU--DRIF wrote:
> This short series adds the 'address type' bit (concept from PCIe) to the
> memory attributes and extends the IOMMUAccessFlags enum. This
> will be required to implement ATS support for the virtual IOMMUs.
> 
> Address type: Field present in the PCIe R/W requests, it allows devices to
> tell the IOMMU if the address provided in the request is physical or not.
> In other words, it allows the devices to use a physical address obtained
> via ATS and to prevent the IOMMU from trying to remap it on the fly.

Two pure questions on the flags, could be relevant to spec:

> 
> Additional IOMMU access flags:
>     - Execute Requested

Does this mean that we can start to put code into DMA regions so that
device can run some day (even if the device may have a core that is totally
different arch v.s. the host's CPUs)?

>     - Privileged Mode Requested
>     - Global
>     - Untranslated Only (cannot be used with 'Address type = translated')

I can understand this with patch 1, but not yet with patch 2.

Patch 1 makes sense to me, IIUC it means the addresses to be used in a pcie
request will be translated addresses which should bypass IOMMU DMAR.

OTOH, patch 2 added it into iotlb access permissions, which I'm not sure
what does it mean.  Perhaps those addresses can only be translated by ATS
pre-translation requests, so that DMA on top of them (in IOVA address
space) will directly fail?

Side note, it might still be more reasonable to put these changes into the
ATS series as the first user of flags.

Thanks,

> 
> Clement Mathieu--Drif (2):
>   pci: Add a memory attribute for pre-translated DMA operations
>   memory: Add permissions in IOMMUAccessFlags
> 
>  include/exec/memattrs.h |  3 +++
>  include/hw/pci/pci.h    |  9 +++++++++
>  include/system/memory.h | 23 +++++++++++++++++++++--
>  3 files changed, 33 insertions(+), 2 deletions(-)
> 
> -- 
> 2.49.0
> 

-- 
Peter Xu