From: Leo Liang <ycliang@andestech.com>
To: Yao Zi <ziyao@disroot.org>
Cc: Rick Chen <rick@andestech.com>, Wei Fu <wefu@redhat.com>,
Yixun Lan <dlan@gentoo.org>,
Maksim Kiselev <bigunclemax@gmail.com>, <u-boot@lists.denx.de>,
Han Gao <rabenda.cn@gmail.com>, Han Gao <gaohan@iscas.ac.cn>
Subject: Re: [PATCH 4/5] riscv: dts: th1520: Preserve CLINT node for SPL
Date: Thu, 3 Jul 2025 16:09:08 +0800 [thread overview]
Message-ID: <aGY6pIE7Vwt4V4Hj@swlinux02> (raw)
In-Reply-To: <20250606042804.64311-5-ziyao@disroot.org>
On Fri, Jun 06, 2025 at 04:28:03AM +0000, Yao Zi wrote:
> Preserve CLINT node for SPL, whose IPI functionality is essential for
> operation of a multi-core system.
>
> Signed-off-by: Yao Zi <ziyao@disroot.org>
> ---
> arch/riscv/dts/th1520.dtsi | 1 +
> 1 file changed, 1 insertion(+)
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
next prev parent reply other threads:[~2025-07-03 8:09 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-06 4:27 [PATCH 0/5] Bring up secondary cores on Lichee Pi 4A Yao Zi
2025-06-06 4:28 ` [PATCH 1/5] riscv: aclint_ipi: Support T-Head C900 CLINT Yao Zi
2025-07-03 7:46 ` Leo Liang
2025-06-06 4:28 ` [PATCH 2/5] riscv: cpu: th1520: Setup CPU feature CSRs in harts_early_init Yao Zi
2025-07-03 8:01 ` Leo Liang
2025-06-06 4:28 ` [PATCH 3/5] riscv: cpu: th1520: Add a routine to bring up secondary cores Yao Zi
2025-07-03 8:06 ` Leo Liang
2025-06-06 4:28 ` [PATCH 4/5] riscv: dts: th1520: Preserve CLINT node for SPL Yao Zi
2025-07-03 8:09 ` Leo Liang [this message]
2025-06-06 4:28 ` [PATCH 5/5] board: thead: licheepi4a: Bring up secondary cores in SPL Yao Zi
2025-07-03 8:11 ` Leo Liang
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