From: "Roger Pau Monné" <roger.pau@citrix.com>
To: Andrew Cooper <andrew.cooper3@citrix.com>
Cc: Xen-devel <xen-devel@lists.xenproject.org>,
Jan Beulich <JBeulich@suse.com>,
Anthony PERARD <anthony.perard@vates.tech>,
Michal Orzel <michal.orzel@amd.com>,
Julien Grall <julien@xen.org>,
Stefano Stabellini <sstabellini@kernel.org>
Subject: Re: [PATCH 3/6] xen/softirq: Rework arch_skip_send_event_check() into arch_pend_softirq()
Date: Thu, 3 Jul 2025 18:21:13 +0200 [thread overview]
Message-ID: <aGat-VxBF5jOErzy@macbook.local> (raw)
In-Reply-To: <20250702144121.1096448-4-andrew.cooper3@citrix.com>
On Wed, Jul 02, 2025 at 03:41:18PM +0100, Andrew Cooper wrote:
> x86 is the only architecture wanting an optimisation here, but the
> test_and_set_bit() is a store into the monitored line and is racy with
> determining whether an IPI can be skipped.
>
> Instead, implement a new arch helper with different semantics; to make the
> softirq pending and decide about IPIs together. For now, implement the
> default helper. It will be overridden by x86 in a subsequent change.
>
> No functional change.
>
> Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
With the adjusted commit message you proposed to Jan:
Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
Just one nit below to comment something.
> ---
> CC: Jan Beulich <JBeulich@suse.com>
> CC: Roger Pau Monné <roger.pau@citrix.com>
> CC: Anthony PERARD <anthony.perard@vates.tech>
> CC: Michal Orzel <michal.orzel@amd.com>
> CC: Julien Grall <julien@xen.org>
> CC: Stefano Stabellini <sstabellini@kernel.org>
> ---
> xen/arch/x86/acpi/cpu_idle.c | 5 -----
> xen/arch/x86/include/asm/softirq.h | 2 --
> xen/common/softirq.c | 8 ++------
> xen/include/xen/softirq.h | 16 ++++++++++++++++
> 4 files changed, 18 insertions(+), 13 deletions(-)
>
> diff --git a/xen/arch/x86/acpi/cpu_idle.c b/xen/arch/x86/acpi/cpu_idle.c
> index dbcb80d81db9..caa0fef0b3b1 100644
> --- a/xen/arch/x86/acpi/cpu_idle.c
> +++ b/xen/arch/x86/acpi/cpu_idle.c
> @@ -436,11 +436,6 @@ static int __init cf_check cpu_idle_key_init(void)
> }
> __initcall(cpu_idle_key_init);
>
> -bool arch_skip_send_event_check(unsigned int cpu)
> -{
> - return false;
> -}
> -
> void mwait_idle_with_hints(unsigned int eax, unsigned int ecx)
> {
> unsigned int cpu = smp_processor_id();
> diff --git a/xen/arch/x86/include/asm/softirq.h b/xen/arch/x86/include/asm/softirq.h
> index 415ee866c79d..e4b194f069fb 100644
> --- a/xen/arch/x86/include/asm/softirq.h
> +++ b/xen/arch/x86/include/asm/softirq.h
> @@ -9,6 +9,4 @@
> #define HVM_DPCI_SOFTIRQ (NR_COMMON_SOFTIRQS + 4)
> #define NR_ARCH_SOFTIRQS 5
>
> -bool arch_skip_send_event_check(unsigned int cpu);
> -
> #endif /* __ASM_SOFTIRQ_H__ */
> diff --git a/xen/common/softirq.c b/xen/common/softirq.c
> index 60f344e8425e..0368011f95d1 100644
> --- a/xen/common/softirq.c
> +++ b/xen/common/softirq.c
> @@ -94,9 +94,7 @@ void cpumask_raise_softirq(const cpumask_t *mask, unsigned int nr)
> raise_mask = &per_cpu(batch_mask, this_cpu);
>
> for_each_cpu(cpu, mask)
> - if ( !test_and_set_bit(nr, &softirq_pending(cpu)) &&
> - cpu != this_cpu &&
> - !arch_skip_send_event_check(cpu) )
> + if ( !arch_pend_softirq(nr, cpu) && cpu != this_cpu )
> __cpumask_set_cpu(cpu, raise_mask);
>
> if ( raise_mask == &send_mask )
> @@ -107,9 +105,7 @@ void cpu_raise_softirq(unsigned int cpu, unsigned int nr)
> {
> unsigned int this_cpu = smp_processor_id();
>
> - if ( test_and_set_bit(nr, &softirq_pending(cpu))
> - || (cpu == this_cpu)
> - || arch_skip_send_event_check(cpu) )
> + if ( arch_pend_softirq(nr, cpu) || cpu == this_cpu )
> return;
>
> if ( !per_cpu(batching, this_cpu) || in_irq() )
> diff --git a/xen/include/xen/softirq.h b/xen/include/xen/softirq.h
> index e9f79ec0ce3e..0814c8e5cd41 100644
> --- a/xen/include/xen/softirq.h
> +++ b/xen/include/xen/softirq.h
> @@ -23,6 +23,22 @@ enum {
>
> #define NR_SOFTIRQS (NR_COMMON_SOFTIRQS + NR_ARCH_SOFTIRQS)
>
> +/*
> + * Ensure softirq @nr is pending on @cpu. Return true if an IPI can be
> + * skipped, false if the IPI cannot be skipped.
> + */
> +#ifndef arch_pend_softirq
> +static always_inline bool arch_pend_softirq(unsigned int nr, unsigned int cpu)
Nit: I would maybe it arch_set_softirq(), I find `pend` not that clear
(I would rather fully spell `pending` instead).
Thanks, Roger.
next prev parent reply other threads:[~2025-07-03 16:21 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-07-02 14:41 [PATCH 0/6] x86/idle: Multiple MWAIT fixes Andrew Cooper
2025-07-02 14:41 ` [PATCH 1/6] x86/idle: Remove broken MWAIT implementation Andrew Cooper
2025-07-03 16:01 ` Roger Pau Monné
2025-07-03 16:19 ` Andrew Cooper
2025-07-02 14:41 ` [PATCH 2/6] x86/idle: Convert force_mwait_ipi_wakeup to X86_BUG_MONITOR Andrew Cooper
2025-07-02 14:41 ` [PATCH 3/6] xen/softirq: Rework arch_skip_send_event_check() into arch_pend_softirq() Andrew Cooper
2025-07-03 8:11 ` Jan Beulich
2025-07-03 10:36 ` Andrew Cooper
2025-07-03 11:24 ` Jan Beulich
2025-07-03 16:21 ` Roger Pau Monné [this message]
2025-07-04 7:23 ` Jan Beulich
2025-07-04 7:55 ` Roger Pau Monné
2025-07-04 8:25 ` Jan Beulich
2025-07-04 16:00 ` Andrew Cooper
2025-07-02 14:41 ` [PATCH 4/6] x86/idle: Implement a new MWAIT IPI-elision algorithm Andrew Cooper
2025-07-03 9:01 ` Jan Beulich
2025-07-03 11:59 ` Andrew Cooper
2025-07-03 14:07 ` Jan Beulich
2025-07-03 17:29 ` Andrew Cooper
2025-07-03 16:36 ` Roger Pau Monné
2025-07-03 17:48 ` Andrew Cooper
2025-07-04 7:24 ` Roger Pau Monné
2025-07-04 16:13 ` Andrew Cooper
2025-07-04 7:52 ` Roger Pau Monné
2025-07-04 16:14 ` Andrew Cooper
2025-07-02 14:41 ` [PATCH 5/6] x86/idle: Drop incorrect smp_mb() in mwait_idle_with_hints() Andrew Cooper
2025-07-03 9:24 ` Jan Beulich
2025-07-03 12:37 ` Andrew Cooper
2025-07-03 13:30 ` Jan Beulich
2025-07-04 15:45 ` Andrew Cooper
2025-07-02 14:41 ` [PATCH 6/6] x86/idle: Fix buggy "x86/mwait-idle: enable interrupts before C1 on Xeons" Andrew Cooper
2025-07-03 9:35 ` Jan Beulich
2025-07-03 9:43 ` Jan Beulich
2025-07-03 12:10 ` Andrew Cooper
2025-07-03 13:11 ` Jan Beulich
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