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d="scan'208";a="186396768" Received: from liuzhao-optiplex-7080.sh.intel.com (HELO localhost) ([10.239.160.39]) by fmviesa001.fm.intel.com with ESMTP; 08 Jul 2025 01:41:24 -0700 Date: Tue, 8 Jul 2025 17:02:52 +0800 From: Zhao Liu To: Alireza Sanaee Cc: qemu-devel@nongnu.org, anisinha@redhat.com, armbru@redhat.com, berrange@redhat.com, dapeng1.mi@linux.intel.com, eric.auger@redhat.com, farman@linux.ibm.com, gustavo.romero@linaro.org, imammedo@redhat.com, jiangkunkun@huawei.com, jonathan.cameron@huawei.com, linuxarm@huawei.com, maobibo@loongson.cn, mst@redhat.com, mtosatti@redhat.com, peter.maydell@linaro.org, philmd@linaro.org, qemu-arm@nongnu.org, richard.henderson@linaro.org, shameerali.kolothum.thodi@huawei.com, shannon.zhaosl@gmail.com, yangyicong@hisilicon.com Subject: Re: [PATCH v14 2/7] hw/core/machine: topology functions capabilities added Message-ID: References: <20250707121908.155-1-alireza.sanaee@huawei.com> <20250707121908.155-3-alireza.sanaee@huawei.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20250707121908.155-3-alireza.sanaee@huawei.com> Received-SPF: pass client-ip=192.198.163.19; envelope-from=zhao1.liu@intel.com; helo=mgamail.intel.com X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-arm@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-arm-bounces+qemu-arm=archiver.kernel.org@nongnu.org Sender: qemu-arm-bounces+qemu-arm=archiver.kernel.org@nongnu.org On Mon, Jul 07, 2025 at 01:19:03PM +0100, Alireza Sanaee via wrote: > Date: Mon, 7 Jul 2025 13:19:03 +0100 > From: Alireza Sanaee via > Subject: [PATCH v14 2/7] hw/core/machine: topology functions capabilities > added > X-Mailer: git-send-email 2.34.1 > > Add two functions one of which finds the lowest level cache defined in > the cache description input, and the other checks if caches are defined > at a particular level. > > Signed-off-by: Alireza Sanaee > --- > hw/core/machine-smp.c | 59 +++++++++++++++++++++++++++++++++++++++++++ > include/hw/boards.h | 7 +++++ > 2 files changed, 66 insertions(+) > > diff --git a/hw/core/machine-smp.c b/hw/core/machine-smp.c > index 0be0ac044c..4baf4a878e 100644 > --- a/hw/core/machine-smp.c > +++ b/hw/core/machine-smp.c > @@ -406,3 +406,62 @@ bool machine_check_smp_cache(const MachineState *ms, Error **errp) > > return true; > } > + > +/* > + * This function assumes l3 and l2 have unified cache and l1 is split l1d > + * and l1i, and further prepares the lowest cache level for a topology > + * level. The info will be fed to build_caches to create caches at the > + * right level. > + */ > +bool machine_find_lowest_level_cache_at_topo_level(const MachineState *ms, > + int *level_found, > + CpuTopologyLevel topo_level) > +{ > + > + CpuTopologyLevel level; > + > + level = machine_get_cache_topo_level(ms, CACHE_LEVEL_AND_TYPE_L1I); > + if (level == topo_level) { > + *level_found = 1; Unfortunately, there is no proper mapping between the cache enumeration and the cache level... > + return true; > + } > + ...at least for now, this is fine for me. We can think of how to organize everything better afterwards. So, Reviewed-by: Zhao Liu